1) parasitic tube
寄生管
1.
Compared with conventional well control method,the goal of real time simulation was achieved by using parasitic tube insufflation.
井控模拟系统是为了进一步加强井控工作,围绕做好一次井控、"及早发现溢流、及时正确关井",落实"井控培训要从理论培训、实际培训、模拟培训、仿真培训四位一体有机结合"的精神,使员工能够真实感受体验井喷实况,进一步提高实战能力,通过计算对比结果,采用寄生管的方法,达到实时模拟的目的。
2) parasitic tubing
寄生油管
3) parasite transistors
寄生晶体管
1.
By comparing the variations of the current flowing through each PN junction of the transistor,the effects of parasite transistors can be studied under different working states,especially under cut-off state and saturation.
通过观察流经各个PN结的电流变化,可以研究数字晶体管在不同工作状态下寄生晶体管的效应。
2.
By comparing the variation of the current flowing through each PN junction of transistors, the effects of parasite transistors in digital integrated transistors can be studied under different working states, especially under cut off state and saturation.
这样通过流经各个PN结的电流的变化 ,可以研究数字集成晶体管在不同工作状态下寄生晶体管的效应 。
4) parasitic diode
寄生二极管
1.
In the high temperature region,taking advantage of the reverse current of the parasitic diode in the MOS transistor,every branch current in the current mirror is compensated,so that the precision of the 30nA current reference is improved from ±1nA to ±0.
利用MOS管寄生二极管反向电流的高温特性,对各支路的镜像电流进行了温度补偿,在-40~130℃范围内的30nA的基准电流精度从±1。
5) Tracheal mite
气管内寄生螨
6) parasitic bipolar transistor
寄生双极晶体管
补充资料：晶体管-晶体管逻辑电路
| 晶体管-晶体管逻辑电路 transistor-transistor logic 集成电路输入级和输出级全采用晶体管组成的单元门电路。简称TTL电路。它是将二极管-晶体管逻辑电路（DTL）中的二极管，改为使用多发射极晶体管而构成。TTL电路于1962年研制成功，基本门电路的结构和元件参数，经历了3次大的改进。同DTL电路相比，TTL电路速度显著提高，功耗大为降低。仅第一代TTL电路产品，就使开关速度比DTL电路提高5～10倍。采用肖特基二极管的第三代TTL电路，开关时间可缩短到3～5纳秒。绝大部分双极型集成电路，都是TTL电路产品。 |
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条