2) floating-point addition
浮点加法
1.
This paper gives a detailed discussion about the "floating-point addition" algorithm and its speciality, it also makes a research on some improve d algorithms and the implementations which have been employed in some DSP chips successfully nowadays.
详细讨论了浮点加法的算法及其特性,研究了现行的一些浮点加法运算单元所采用的改进算法及其电路实现,并介绍了这个领域的一些新技术。
4) floating-point adder
浮点加法器
1.
An Approach of Design for High-Speed Floating-point Adder;
一种高速浮点加法器的设计实现
2.
Floating-point LMS Algorithm is implemented successfully based on the multi-input structure-efficient floating-point adder presented.
文中根据多输入高效浮点加法器结构在FPGA(现场可编程门阵列)上实现了浮点LMS算法。
5) Floating-point Fused Multiply-add
浮点乘加器
1.
Latency Analysis of an Improved Floating-point Fused Multiply-add;
一种改进的浮点乘加器结构的延时分析
2.
Based on the idea of multi-path,this thesis proposes an improved multi-path floating-point fused multiply-add(MAF).
基于多通路的思想,文章提出了一种改进的多通道浮点乘加器结构。
6) Floating point adder
浮点加法器
1.
Floating point adder is an important block in IC datapaths Its performance and power consumptions have a great effect on the performance of processors and DSP s In this paper, several architectures for floating point adder are summarized and analyzed A low power triple datapath architecture is described in particular Finally, the practicability of floating point adder architecture has been analyze
浮点加法器是集成电路数据通道中重要的单元 ,它的性能和功耗极大地影响着处理器和数字信号处理器的性能。
补充资料：浮点运算
分子式：
CAS号：
性质：把一个数表示为尾数部分和指数部分，则称该数为浮点数(floating point number)。例如十进制数为+63.8写成浮点数则为0.638×102，其中+0.638是尾数部分，102是指数部分。对浮点数进行的算术运算称为浮点运算。
CAS号：
性质：把一个数表示为尾数部分和指数部分，则称该数为浮点数(floating point number)。例如十进制数为+63.8写成浮点数则为0.638×102，其中+0.638是尾数部分，102是指数部分。对浮点数进行的算术运算称为浮点运算。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条