1) the power supply of the suppressor
抑制极电源
2) PSR
电源抑制
1.
A Design of High PSR CMOS Reference Source;
高电源抑制CMOS基准源的设计
2.
This paper analyzes the scheme,and reveals that the VCCS circuit conduces to improvements of transient response and power suppression ratio(PSR) performance of the LDO.
文章分析了VCCS频率补偿方法的原理和VCCS电路对LDO的瞬态响应及电源抑制(PSR)特性的改善作用,并提出了一种新的VCCS电路结构。
3.
The piecewise corrected current generator also forms negative feedback to improve the line regulation and power supply rejection(PSR).
该分段线性电流产生电路还形成了一个负反馈,以改善带隙基准源的电源抑制和线性调整率。
3) Power supply rejection
电源抑制
1.
It has high power supply rejection:PSR>120 dB at low frequency and PSR>50 B at high frequency.
设计了一种基于新型启动电路的高电源抑制(PSR)的带隙基准电压源。
2.
A low noise,high power supply rejection(PSR) low-dropout regulator is presented.
实现了一种低噪声、高电源抑制(PSR)的低压降线性稳压器。
3.
In order to improve its power supply rejection, an on-chip LDO regulator is applied in the high speed, low power pipelined interpolating A/D converter.
在该流水插值A/D转换器中引入了片上的LDO稳压器,以改善其电源抑制,并对应用在该流水插值A/D转换器中的带隙基准源和LDO稳压器等相关电路技术进行了研究。
4) PSRR
电源抑制
1.
According to the integrate circuit design requirements of bandgap voltage source with low power,high-line regulation and high-PSRR,a new structure of highly precise self-bias bandgap voltage souce with the CMOS technic was designed.
根据当前集成电路设计中对基准电压源的低功耗、高电源调整率、高电源抑制比的要求,设计了一种CMOS工艺下的高精度自偏置带隙基准电压源。
2.
The bandgap reference uses a pre-regulator with supply ripple subtraction technique to improve its power supply rejection ratio (PSRR).
实现了一种高精度带隙基准源,该基准源在预调节电路中应用了电源行波减法技术,显著改善了输出电压的电源抑制比。
5) power supply rejection ratio
电源抑制比
1.
The circuit also has a high power supply rejection ratio,about 69 dB when power supply voltage changes from 3.
6 V内,电源抑制比为69 dB。
2.
The circuit has high power supply rejection ratio (PSRR) and low-temperature coefficient.
5μmCMOSN阱工艺制作的带隙基准电压源电路,该电路具有高电源抑制比和较低的温度系数。
3.
A design of high precision and high power supply rejection ratio(PSRR) was presented.
5mV,低频电源抑制比达到75dB以上。
6) PSRR
电源抑制比
1.
CMOS bandgap reference voltage source with high PSRR;
一种高电源抑制比的CMOS带隙基准电压源
2.
A High-PSRR CMOS Bandgap Reference Without Resistor;
一种无电阻高电源抑制比的CMOS带隙基准源(英文)
3.
An Improved Bandgap Voltage Reference with High PSRR;
一种高精度高电源抑制比的带隙基准电压源的设计
补充资料：“质子-电子偶极-偶极”质子弛豫增强
“质子-电子偶极-偶极”质子弛豫增强
物理学术语。原子核外层中不成对的电子质量小，但磁动性很强，可使局部磁场波动增强，促使氢质子弛豫加快，从而使T1和T2缩短，这种效应即为PEDDPRE。过渡元素和镧系元素大部分在d和f轨道有多个不成对电子，所以其离子往往具有PEDDPRE，可用来作顺磁性对比剂，如钆(Gd)。Gd在外层有7个不成对电子，具有很强的顺磁性。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条