1) power supply ripple rejection ratio
电源纹波抑制比
2) power supply rejection ratio
电源抑制比
1.
The circuit also has a high power supply rejection ratio,about 69 dB when power supply voltage changes from 3.
6 V内,电源抑制比为69 dB。
2.
The circuit has high power supply rejection ratio (PSRR) and low-temperature coefficient.
5μmCMOSN阱工艺制作的带隙基准电压源电路,该电路具有高电源抑制比和较低的温度系数。
3.
A design of high precision and high power supply rejection ratio(PSRR) was presented.
5mV,低频电源抑制比达到75dB以上。
3) PSRR
电源抑制比
1.
CMOS bandgap reference voltage source with high PSRR;
一种高电源抑制比的CMOS带隙基准电压源
2.
A High-PSRR CMOS Bandgap Reference Without Resistor;
一种无电阻高电源抑制比的CMOS带隙基准源(英文)
3.
An Improved Bandgap Voltage Reference with High PSRR;
一种高精度高电源抑制比的带隙基准电压源的设计
4) power supply rejection ratio
电源电压抑制比
5) PSRR
电源电压抑制比
1.
In this paper,the voltage reference realized by CSMC1UM40V_CMOS high voltage process is proposed,In addition to low temperature coefficient,high power supply rejection ratio(PSRR),larger closed-loop phase margin and low-power,etc.
本论文里介绍了一种基于CSMC1UM40V_CMOS高压工艺实现的基准电压源,该基准源除了具有低温度系数、高电源电压抑制比、较大的闭环相位裕度和低功耗等优点外,增加了上电复位功能,提高了瞬态响应速度,这样就可以在模数混合芯片中得到广泛的应用。
6) power-supply rejection ratio
电源电压抑制比
1.
In this method,the negative feedback system constructed by the PTAT current source and the micropower operation amplifier is employed to improve the power-supply rejection ratio(PSRR).
该方法基于工作在亚阈值区的MOS管,利用PTAT电流源与微功耗运算放大器构成负反馈系统以提高电源电压抑制比。
2.
The results have proved that the reference has low temperature coefficient and high power-supply rejection ratio.
在对传统的带隙基准电压源电路分析和总结的基础上,提出了一种基于BiCMOS工艺的,新颖的自偏压共源共栅电流镜结构的高精度带隙基准电压源,利用cadence软件对其进行仿真验证,结果证明了该带隙基准电压源具有低温度系数和高电源电压抑制比,目前在PWM中有着良好的应用前景。
补充资料:比昂斯滕·比昂松
比昂斯滕·比昂松(1832~1910)挪威戏剧家、诗人、小说家。主要作品有剧作《皇帝》、《挑战的手套》,诗集《诗与歌》等。1903年作品《挑战的手套》获诺贝尔文学奖 。获奖理由: “他以诗人鲜活的灵感和难得的赤子之心,把作品写得雍容、华丽而又缤纷”。
说明:补充资料仅用于学习参考,请勿用于其它任何用途。