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1)  static current
功耗电流
1.
The paper calculates theoretically the influence of different kind of PI with different thickness on the static current of LCD, then compares in practice the influence of KPI-300B and SE-2170 on the static current, and two dilution (NMP from Germany and NIS-SAN PI special dilution 21) mixed with PI upon the static current of LCD.
从理论上计算了不同种类、不同厚度的 PI对LCD功耗电流的影响,从实验上比较了KPI-300B和SE-2170在选用不同厚度时对功耗电流值的影响以及德国进口稀释剂NMP和NISSAN──PI专用稀释剂21在配PI后对LCD盒的功耗电流的影响,并对这种影响原因进行了解释,从而为PI材料的选用及相应的LCD功耗电流控制标准的制定提供了一些有价值的实验和理论依据。
2)  leakage power
漏电流功耗
1.
Solutions to some technological difficulties such as leakage power opt.
文中以基于90纳米工艺的GSM非智能多媒体手机基带芯片为例,从前段概念设计到后端物理实现具体讲述如何做好供电切换技术在超大规模集成电路中的应用,以及在设计中如何降低漏电流功耗和如何解决时钟树综合等技术难点的方法。
2.
The leakage power issue is challenging high-performance microprocessor design, especially as feature size shrinks.
随着集成电路制造工艺进入超深亚微米阶段,漏电流功耗在微处理器总功耗中所占的比例越来越大,在开发新的低漏流工艺和电路技术之外,如何在体系结构级控制和优化漏流功耗成为业界研究的热点。
3.
Based on the “amplifying” idea,simple circuits for measuring the gate delay,dynamic power,leakage power,and their variations for a 90nm process are designed.
0%,漏电流功耗的波动范围为19。
3)  low power current-sensing
低功耗电流检测
4)  dynamic consumption current
动态功耗电流
1.
Experiments also suggest that research on the TDEs of SRAM and ROM should take the static consumption current and dynamic consumption current as the effective criterions for the damage threshold of TDEs other than testing the data access function only,because the static consumption current and dynamic consumption current are all sensitive to TDEs.
实验还表明,研究SRAM、ROM的总剂量辐射效应,只对数据存取功能进行测试是不完善的,器件的静态功耗电流与动态功耗电流也是总剂量辐射效应的敏感参数,应该作为总剂量辐射效应失效阈值的有效判据。
5)  quiescent power dissipation current
静态功耗电流
1.
The other important conclusion of this paper is that we prove quiescent power dissipation current must be a main factor while evaluating the effect of shielded packages using CMOS device.
通过分析,指出了当前屏蔽材料封装存在的不足,以及在采用CMOS器件考察抗辐射屏蔽封装材料时应该重点考虑静态功耗电流
6)  leakage power
漏流功耗
1.
Two important techniques to reduce leakage power in caches are sleep cache and drowsy cache in which the cache lines unused recently can be put into low-power mode.
随着工艺尺寸的缩小,漏流功耗逐渐成为制约微处理器设计的主要因素之一。
2.
This paper provides a cache leakage power estimation model based on statistics.
本文提出了一种基于统计信息的Cache漏流功耗估算模型。
补充资料:标准冲击电流波形(见冲击电流发生器)


标准冲击电流波形(见冲击电流发生器)
standard impulse current wave form

  blaozhun ehonglld}0n4一u box]ng标准冲击电流波形(standard impulse currentwave form)见冲击电流发生器。
  
说明:补充资料仅用于学习参考,请勿用于其它任何用途。
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