1) CMOS dynamic D flip-flop
CMOS动态D触发器
1.
Through analyzing its work principle, we find the method to raise the speed: use a novel CMOS dynamic D flip-flop and an improved synchronous frequency divider.
分析了双模前置分频器的工作原理 ,提出了提高其工作速度的方法 ,包括给出一种新型高速CMOS动态D触发器的设计以及同步分频器的改进。
2) CMOS flip-flops
CMOS触发器
3) D Flip-flop
D触发器
1.
Study on the output duration of a D flip-flop mixer for measuring frequency difference
D触发器实现差频的输出特性分析
2.
The source coupled logic (SCL) D flip-flops are adapted to reduce the switching noise and power consumption, also for high frequency operation.
描述了一个应用于高集成度2 GHz频率综合器的预分频电路的设计,预分频电路中D触发器采用了源极耦合逻辑电路结构,可以提高电路工作频率,同时有效减小开关噪声和电路功耗。
3.
Two typical master-slave type D flip-flop of strong hardness to Single Event Upset(SEU) for radiation environment are introduced.
介绍了两种已有的主从型边沿D触发器,它们具有很强的抗单粒子翻转能力。
4) D-flip-flop
D触发器
1.
A kind of phase difference measure circuit which is composed exclusive or gate and D-flip-flop.
一种用异或门及D触发器组成的0～±180°相位差测量电路,能够测量两个同频率的交流量的相位差及其相位关系。
2.
A novel edge-triggered D-flip-flop based on a resonant tunneling diode (RTD) is proposed and used to construct a binary frequency divider.
提出了一种基于共振隧穿二极管的新型边沿触发D触发器并将之用于构成二进制分频器。
5) D trigger
D触发器
1.
Through redesigning the structure of the original PFD circuit and based on the traditional D trigger PFD,two new PFDs,transmission gate D trigger PFD and flip-latch based PFD were proposed.
通过对原有PFD电路结构进行重新设计,在传统D触发器PFD的基础上提出了两种新型PFD:传输门D触发器型PFD和基于锁存器的PFD。
6) D-trigger
D触发器
1.
Design to CMOS D-Trigger Based on Micowind and HSpice;
Micowind与HSpice设计CMOS D触发器
2.
D-trigger was used for frequency dividing,and a 1∶2 frequency divider based on host-slave D-trigger was designed.
采用D触发器进行分频,设计了基于主从D触发器的1∶2分频器,该分频器主要由输入缓冲电路、分频器内核、输出缓冲电路和电流偏置电源四个模块组成。
补充资料：动态
①（事情）变化发展的情况：科技～ㄧ从这些图片里可以看出我国建设的～。②艺术形象表现出的活动神态：画中人物，～各异，栩栩如生。③运动变化状态的或从运动变化状态考察的：～工作点ㄧ～电流ㄧ～分析。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条