1) TFT manufacture
薄膜晶体管制造
2) TFT
薄膜晶体管
1.
A Novel Ultra-Thin Channel Poly-Si TFT Technology;
多晶硅超薄沟道薄膜晶体管研制(英文)
2.
Charge Sharing Effects of Grain Boundary in Polysilicon TFTs;
多晶硅薄膜晶体管中的晶粒间界电荷分享效应
3.
An FAAS method for the determination of mass ratio of chemical composition in thin film transistors ( TFT ) of CdSe is proposed in this paper.
以特纯CdSe为标样 ,用火焰原子吸收法 (FAAS) ,分别测定CdSe薄膜晶体管 (TFT)中Cd与Se的含量及化学组成质量比 ,分别验证了CdSe粉末总量测定值 ,CdSe粉末化学组成质量比测定值 ,薄膜样品测定值的准确度 ,其相对误差分别为 0 4 2 %、-3 8%和 -0 5 %。
3) thin film transistor
薄膜晶体管
1.
The fabrication of thin film transistors with ZnO as active channel layer;
以ZnO为沟道层的薄膜晶体管制备研究
2.
This paper describes the historical background,the typical structure and actual application in AMLCDs of thin film transistor.
ZnO作为活性层制作薄膜晶体管(thin film transistor,简称TFT),因性能改进显著而成为新兴的研究热点。
3.
The paper analylizes the operation characteristics of this kind of transistor according to the test results of the fabricated a Au/CuPc/Al/CuPc/of structure organic thin film transistor with vertical conductive channel.
根据试制的Au/CuPc/A l/CuPc/Au结构的垂直导电沟道有机薄膜晶体管的测试结果,分析了该晶体管的工作机理。
4) thin film transistors
薄膜晶体管
1.
Thin Film Transistors Based on Oxide Semiconductors
基于氧化物半导体的薄膜晶体管
2.
Using the approach p type poly Si thin film transistors (TFTs) is fabricated with electron mobility of 103cm 2/(V·s) and ON/OFF current ratio of 10 6.
测量了相应薄膜晶体管的转移特性和输入输出特性 ,由此得出薄膜晶体管的迁移率为 1 0 3 cm2 /( V·s) ,ION/IOF F为 1 0 6 ,分别是传统单步晶化制备的薄膜晶体管的2 。
3.
Using this approach,poly-Si thin film transistors (TFTs) with electron mobility of 103 cm 2/V·s and on/off current ratio of 1×10 7 are prepared.
采用新型的两步激光晶化技术在玻璃衬底上制备出性能良好的多晶硅薄膜 ,并制作了多晶硅薄膜晶体管 ,其迁移率为 10 3cm2 /V·s ,开关态电流比为 1× 10 7。
5) thin-film transistor
薄膜晶体管
1.
The a-Si:H thin-film transistor (TFT) technology is mature and well suited to produce active matrix display devices in view of its low fabrication costs over large areas, good process uniformity and adequate switching speed, the option of a low-temperature process that allows the fabrication of TFTs and circuits on mechanically flexible substrates.
非晶硅薄膜晶体管(a-Si:H TFT)作为一种成熟的电子器件,因其大面积制造成本低廉、工艺重复性良好、开关速度适当,非常适合于有源矩阵显示器件。
2.
In order to overcome the unsaturated output current of hydrogenated amorphous-silicon thin-film transistors(a-Si:H TFTs),the output characteristics of a-Si:H TFTs are numerically simulated by using the semiconductor device simulation software,and the generation mechanism of the unsaturated output current is discussed.
针对氢化非晶硅薄膜晶体管中的输出电流不饱和现象,采用半导体器件模拟软件对非晶硅薄膜晶体管的输出特性进行了数值仿真,并探讨了不饱和输出电流的产生机理。
6) Transparent thin-film transistor
透明薄膜晶体管
1.
A novel transparent thin-film transistor was fabricated by rf reactive magnetron sputtering,structure of which was that ITO glass was used as substrate,Al2O3 and AlN as insulator layers were deposited onto it successively,and then active layer ZnO film was deposited onto the Al2O3/AlN compound substrate,Al was used as source and drain electrodes.
采用射频反应磁控溅射的方法,以ITO(铟锡氧化物)玻璃为衬底,在Al2O3/AlN复合栅极绝缘层上沉积有源层ZnO薄膜,并以Al作为透明薄膜晶体管器件源极和漏极,通过XRD、透射光谱研究了透明薄膜晶体管的有源层ZnO的结晶情况以及对器件在可见光范围内的透过特性的影响,得出以Al2O3/AlN为复合缓冲层薄膜晶体管,在400℃温度下退火处理后,ZnO有源层有较好的c-axis(002)择优取向,器件在可见光的范围内整体透过率在88%以上,从而实现了ZnO-TFT器件在可见光范围内的透明。
补充资料：晶体管-晶体管逻辑电路
| 晶体管-晶体管逻辑电路 transistor-transistor logic 集成电路输入级和输出级全采用晶体管组成的单元门电路。简称TTL电路。它是将二极管-晶体管逻辑电路（DTL）中的二极管，改为使用多发射极晶体管而构成。TTL电路于1962年研制成功，基本门电路的结构和元件参数，经历了3次大的改进。同DTL电路相比，TTL电路速度显著提高，功耗大为降低。仅第一代TTL电路产品，就使开关速度比DTL电路提高5～10倍。采用肖特基二极管的第三代TTL电路，开关时间可缩短到3～5纳秒。绝大部分双极型集成电路，都是TTL电路产品。 |
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条