In order to slove the problem of OCS AHB limited bus bandwidth,this paper tells of an interconnect martix architectural multi-layer AHB bus based on AHB bus,and describes the design and implementation of the bus according to the designs of various submodules and intercommunication between among them.

Research of transaction level AHB bus model

This paper introduces the design and implementation of an AHB bus bridge of crossing clock domains.

As the basic SoC design technique,the AHB bus interface design consists of master module interface design and slave module interface design.

Design of an AHB Bus Arbitrator Device;

The characteristics of design for embedded CPU based on IP core are analyzed ,then provides the hole problems existing in design of AHB (advanced high-performance bus) interface in a ARM core based CPU .

Implementation of JPEG decoding based on AMBA-AHB multi-processor architecture