1) ESD stress
ESD应力
1.
Diffused resistor model under ESD stress in linear,saturation,multiplication and snapback,and secondary breakdown regions was analyzed.
对ESD应力下扩散电阻的四个区域:线性区、饱和区、雪崩倍增和负微分电阻区、二次击穿区的模型进行了分析。
2) Equivalent Spherical Diameter(ESD)
相应球形直径(ESD)
3) ESD method
ESD法
4) ESD valve
ESD阀
5) ESD pulse
ESD脉冲
1.
Some integrated circuits were injected by rectangular pulse and ESD pulse for comparison of the damage effects caused by the two types of pulses.
采用方波脉冲和ESD脉冲对3种集成电路进行了注入损伤效应实验,目的是比较二者对器件损伤的异同之处。
6) ESD protection
ESD保护
1.
6μm BiCMOS process, because of the different internal base resistance, CEB, CEBE structures have better SNAPNACK effect and a high ESD protection efficiency than CBE, CBEB structures.
6μmN外延BiCMOS工艺为基础,研究了纵向NPN管的ESD保护行为,并对不同版图结构的纵向NPN管进行了ESD行为研究。
2.
The key problem originates from the complex interaction between the ESD protection circuitry and the core RF IC circuit under protection.
产生这一挑战的关键原因在于ESD保护电路和被保护的RF IC核电路之间存在着不可避免的复杂交互影响效应。
3.
In this thesis work, some CMOS on-chip ESD protections are investigated.
本论文主要研究了CMOS工艺中,集成电路片内ESD保护电路的设计。
补充资料：轧辊残余应力(见轧辊应力)
轧辊残余应力(见轧辊应力)
residual stresses in roll
zhagun eanyu yingli轧辊残余应力(residual stresses in roll)见礼辐应力。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条