The application of CF series thyristor triggers in machine tools electric;

Integration of PACS and HIS with database trigger;

Application of trigger teachnology to SQL server 2000;

Energy recovery CMOS flip-flops using two-phase power-clock;

Logic Functional Simulation Research of Multi-flip-flop Based on CPLD/FPGA Device;

A low-power ternary D-type flip-flop design based on clock-gating technique;

Synthesis of latch and flip flop is one of the main problems which should be solved in sequential logic synthesis system.

Taking 4 phase 8 beat pulse allotter by backward forward control as an example, the authors analyse the design principle of pulse allotter at length, and the total hardware pulse allotter is implemented with D edge flip flop and logic gate circuit.

By means of clock raced pulse,an approach to design quaternary edge triggered flip flops is presented.

Two novel types of low clock-swing TSPC flip-flops;

Low power ternary double edge-triggered flip-flops;

A new design of low-power half-static D flip-flops;

Monitoring data flows and information using triggers in dynamic workflow;

Application of triggers in large databases;