1.
Synchronization Mechanism and Time Sequence Clock Research in MPEG;
![点击朗读](/dictall/images/read.gif)
MPEG的同步机制及其时序时钟恢复
2.
Research and Implement of Clock Recovery in TDMoIP Based on RPR
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基于RPR的TDMoIP时钟恢复研究和实现
3.
Research and Design of High Speed Clock Recovery Circuit on ASIC
![点击朗读](/dictall/images/read.gif)
高速时钟恢复电路的ASIC研究与设计
4.
Research and Implementation of Clock Recovery Algorithm in TDM-over-IP
![点击朗读](/dictall/images/read.gif)
关于TDMoIP时钟恢复算法的研究与实现
5.
System clock recover is the key in digital TV system.
![点击朗读](/dictall/images/read.gif)
系统时钟恢复是数字电视系统设计中的难点。
6.
Research on Ultra High Speed Clock Recovery IC for Optical-Fiber Transmission System;
![点击朗读](/dictall/images/read.gif)
光纤传输系统用超高速时钟恢复集成电路研究
7.
Design of 2.5 GB/s Clock Recovery Circuit Based on 0.18 μm CMOS Technique
![点击朗读](/dictall/images/read.gif)
基于0.18μm CMOS工艺的2.5GB/s时钟恢复电路设计
8.
Experimental study of optical clock recovery by the application of photonic crystal fiber
![点击朗读](/dictall/images/read.gif)
光子晶体光纤应用于光时钟恢复的实验研究
9.
Design of a High-speed Integrated PLL for Clock Recovery Circuit
![点击朗读](/dictall/images/read.gif)
用于时钟恢复电路的高速集成锁相环设计研究
10.
This dissertation focuses on the optical clock recovery techniques inoptical packet switching (OPS) network.
本文主要研究应用于光分组交换网络的全光时钟恢复(提取)技术。
11.
The Integrate Circuit Design for 10-40Gb/s Optical Communication and 10 Gigabit Ethernet Clock-Recovery;
10-40Gb/s光通信与万兆以太网时钟恢复电路芯片研究
12.
Design of Phase-locked Loop for USB2.0 Application;
![点击朗读](/dictall/images/read.gif)
应用于USB2.0时钟数据恢复的锁相环设计
13.
Design of 2.5GHz Full Speed Clock and Data Recovery Circuit
![点击朗读](/dictall/images/read.gif)
2.5GHz全速率时钟数据恢复电路的设计
14.
The Design and Realization of Clock and Data Recovery of Burst Mode
![点击朗读](/dictall/images/read.gif)
突发模式时钟数据恢复的研究与实现
15.
A clock and data recovery method based on phase detector implemented by delay chain in FPGA
利用FPGA延时链实现鉴相器时钟数据恢复
16.
Design and Implementation of a 2.5Gbps Clock Data Recovery Circuit for PCI Express;
![点击朗读](/dictall/images/read.gif)
PCI Express中的2.5Gbps时钟数据恢复电路的设计与实现
17.
Design and Implementation of a High Performance Clock and Date Recovery Circuit
![点击朗读](/dictall/images/read.gif)
高性能时钟数据恢复电路的设计与实现
18.
Design of high-speed clock and data recovery circuit Based on FPGA
![点击朗读](/dictall/images/read.gif)
基于FPGA的高速时钟数据恢复电路的实现