1.
One Large Multiplication's Fast Implementation
一种快速大数乘法器的设计方法——大数乘法的高速实现
2.
However, by using traditional multiplier, there is data dependency between iterations. To reduce the delay of data dependency, a novel multiplier, named oblong multiplier by its partial product shape is proposed.
用传统的平行四边形乘法器实现大数模幂乘 ,存在两次迭代之间的数据相关问题 .
3.
multiplier quotient register
乘(数)-商(数)寄存器
4.
Multiplier is the key in the Digital Signal Processing System.
乘法器是数字信号处理系统中的关键。
5.
Design CSD Serial-Parallel Multiplier for Constant Coefficients FIR Filter
常系数FIR中的CSD串并乘法器设计
6.
Improvement of The FIR Multiplication Module Based on FPGA
基于FPGA的数字滤波器乘法模块改进
7.
The register used to contain a multiplier in multiplication and the quotient in division.
在乘法运算中存放乘数,在除法运算中存放商的一种寄存器。
8.
In multiplication, the number or quantity by which the multiplicand is multiplied.
乘法中,与被乘数相乘的数或量。同multiplierfactor。
9.
Monolithic Integrated 16×16 bit Multiplier Operating in Parallel and Pipeline
单片集成并行流水线操作16×16位数字乘法器
10.
Research and Development of the High Performance Full Custom 64-bits Parallel Integral Multiplier;
高性能64位并行整数乘法器全定制设计与实现
11.
The Research of Least Squares Techeniques for Stable IIR Digital Filter;
稳定IIR数字滤波器的最小二乘算法研究
12.
Design and Implementation of Single-precision Floating Point Multiplier Based on Verilog
基于VeriIog的单精度浮点数乘法器的设计与实现
13.
In the paper,a combined number generator based on the method of Mersenne Twister and prime modulo multiplicative linear congruence generators is proposed.
提出基于Mersenne Twister法和素数模乘同余法的随机数组合发生器。
14.
Digit-serial binary field multiplier based on Mastrovito multiplication
基于Mastrovito乘法的字串行特征二域乘法器
15.
RELIABILITY ANALYSIS OF DAM BASED ON LAGRANGE MULTIPLIER RULE
基于拉格朗日乘数法计算大坝结构可靠度
16.
The Study on a Multiplication Decomposing-Algorithm and Its Application in FIR Filters Design;
一种乘法分解算法及其在FIR数字滤波器设计中的应用研究
17.
Application of Equalization Filter Based on Least Square Method in Electric Method Data Processing
基于最小二乘法的均衡滤波器在高密度电法数据处理中的应用
18.
quarter-square multiplier
四分之一平方乘法器