1.
Multi-Valued Flip-Flop and Its Application in the Sequential Circuits Design
多值触发器及其在时序电路设计中的应用
2.
Design of multi-valued double-edge-triggered D flip-flop based on clock-controlled neuron MOS transistor
基于钟控神经MOS管的多值双边沿D触发器设计
3.
Furthermore,the proposed construction can be easily extended to the design of multiple valued edge triggered flip flop with a higher radix.
此外 ,该设计结构极易推广至基值更高的多值边沿触发器的设计
4.
trigger gate width multivibrator
触发脉宽多谐振荡器
5.
You can't design more than one view, default, rule, procedure, or trigger at a time.
不能一次设计多个视图、默认值、规则、过程或触发器。
6.
clocked flip flop
时标触发器定时触发器
7.
Novel current-mode CMOS quaternary edge-triggered flip-flops
新型电流型CMOS四值边沿触发器设计
8.
triggered spark gap
触发放电器触发火花隙
9.
The trigger properties cannot be updated. A trigger that retrieves messages is not allowed when multiple triggers are associated with the queue.
无法更新触发器属性。当多个触发器与此队列相关联时，不允许使用触发器检索消息。
10.
trigger delay multivibrator
触发脉冲延迟多谐振荡器
11.
flip flop circuit
双稳态多谐振荡器触发电路
12.
An Application of CAN-Controller to the multi-fulcrum Trigger System
CAN控制器在多支点触发系统中的应用
13.
Development of the Multichannel HV IGBT Driver Trigger Based on FPGA
采用FPGA的多路高压IGBT驱动触发器研制
14.
Ternary Edge-triggered Flip-Flop Based on Modular Algebra and its Application
基于模代数的三值维持阻塞触发器及其应用
15.
"Exciter(premodulator, trigger)"
激励器(预调器、触发器)
16.
reset set flip flop
置1置0触发器置位复位触发器
17.
Information should not be transferred from the master portion of the flip-flop to the slave portion.
信号不能从主触发器传到从触发器。
18.
Allow triggers to be fired which fire other triggers (nested triggers)
允许激发会激发其它触发器（嵌套触发器）的触发器