1.
Study on Relationship between Blood Lipid Levels and HDL Subclasses Distribution;
血脂水平与HDL亚类分布关系的研究
2.
Detecting the Level of Lipid, Apoprotein, HDL-subclasses in Serum with Knee Osteoarthritis;
膝骨性关节炎患者血清脂质、载脂蛋白、HDL亚类的测定
3.
Effect of Physical Activity on HDL-C and its Subfractions HDL_2-C and HDL_3-C;
身体活动对HDL-C及其亚类HDL_2-C和HDL_3-C的影响
4.
The Clinical Research on the Relationship between Serum LCAT、HDL_2、HDL_3 and TCM Syndromes in Chronic Glomerulonephritis;
慢性肾炎中医证型与LCAT、HDL亚组分相关性的临床研究
5.
Study on Inhibition of LDL and HDL Oxidation by Five Flavoniods;
五种黄酮类化合物抑制LDL及HDL氧化修饰作用的研究
6.
Design and Implementation of High Speed Reusable SPI Bus with Verilog HDL;
高速可复用SPI总线的设计与Verilog HDL实现
7.
Design of The PMW output control based on verilog HDL;
基于Verilog HDL设计的PWM输出控制
8.
HDL s Change and Metabolism Under the Oxygen Movement Condition;
HDL在有氧运动条件下的变化与代谢
9.
On How to Reach the Interface Transfers of Parallel-series and Series-parallel by the Language Performs of Verilog HDL;
用Verilog HDL语言实现并串、串并接口的转换
10.
The Status Quo and Development of Several Hardware Description Languages;
几种硬件描述语言HDL的现状与发展
11.
Using the Verilog HDL to Design the USB IP Core;
USB IP Core的Verilog HDL语言设计方法
12.
Design of a RISC/DSP Microprocessor IP Core Based on Verilog-HDL
基于Verilog-HDL的RISC/DSP微处理器IP核的设计
13.
The design of DDS arbitrary waveform generator based on Verilog HDL
基于Verilog HDL的DDS任意波形发生器设计
14.
HDL Design and Post Simulation of IrDA Circuit
IrDA编解码电路的HDL设计与后仿真
15.
Blocking assignment property and its application in Verilog HDL
Verilog HDL阻塞属性探究及其应用
16.
The Summary of Doing Synthesizable By Using Design Compiler
用Verilog HDL进行可综合RTL设计概述
17.
HDL Design and Simulation of SHA-1 Algorithm
SHA-1算法的HDL设计与仿真
18.
Observerability Analysis of HDL Designs Based on CLP Model
基于CLP模型的HDL设计可观测性分析