1.
Monolithic Integrated 16×16 bit Multiplier Operating in Parallel and Pipeline
单片集成并行流水线操作16×16位数字乘法器
2.
Multiplier is the key in the Digital Signal Processing System.
乘法器是数字信号处理系统中的关键。
3.
Improvement of The FIR Multiplication Module Based on FPGA
基于FPGA的数字滤波器乘法模块改进
4.
The Research of Least Squares Techeniques for Stable IIR Digital Filter;
稳定IIR数字滤波器的最小二乘算法研究
5.
Digit-serial binary field multiplier based on Mastrovito multiplication
基于Mastrovito乘法的字串行特征二域乘法器
6.
The Study on a Multiplication Decomposing-Algorithm and Its Application in FIR Filters Design;
一种乘法分解算法及其在FIR数字滤波器设计中的应用研究
7.
A Sequential Constrained Least-Squares Approach to Constrained Chebyshev Design of IIR Digital Filter;
IIR数字滤波器约束Chebyshev设计的序列约束最小二乘算法
8.
The Research of Iterative Reweightd Least Squares Techniques for FIR Digital Filters;
FIR数字滤波器设计的迭代重加权最小二乘算法研究
9.
any of the numbers (or symbols) that form a product when multiplied together.
任何一个参与乘法运算的数字或符号。
10.
Example of Popularity and Use of Carrying Principle of the Numerical Multiplication;
数字乘法进位原理的推广及应用一例
11.
multiplier quotient register
乘(数)-商(数)寄存器
12.
One Large Multiplication's Fast Implementation
一种快速大数乘法器的设计方法——大数乘法的高速实现
13.
Design CSD Serial-Parallel Multiplier for Constant Coefficients FIR Filter
常系数FIR中的CSD串并乘法器设计
14.
To man, division makes small and multiplication makes big a thing.
对人们来说，除法运算可以让数字变小，而乘法运算则使数字变大。
15.
The register used to contain a multiplier in multiplication and the quotient in division.
在乘法运算中存放乘数,在除法运算中存放商的一种寄存器。
16.
In multiplication, the number or quantity by which the multiplicand is multiplied.
乘法中,与被乘数相乘的数或量。同multiplierfactor。
17.
The simplest approach is to only permit multiplication and division by scalar numbers.
最简单的办法是我们只允许对标量数字进行乘法和除法运算。
18.
Research and Development of the High Performance Full Custom 64-bits Parallel Integral Multiplier;
高性能64位并行整数乘法器全定制设计与实现