1.
The Research and Implementation of Double Data-path Fused Floating Point Multiply-Add Supporting Parrall Multiply;
支持并行整数乘的双通路浮点融合乘加结构的研究与实现
2.
The Design of Floating-Point Multiply-Add Fused Units in General Purpose Processors;
高性能通用处理器中浮点乘加部件的设计
3.
Research and Realization of a 128-Bit Multiply-Add-Fused Unit
一种128位高精度浮点乘加部件的研究与实现
4.
floating-point adder
浮点加法器，浮点加
5.
Moving Least Squares Based Incremental Multi-View Range Images Integration Algorithm
移动最小二乘增量式多视点云数据融合算法
6.
Research on 32 Bit High-Speed Floating-Point Multiplier Design;
32位高速浮点乘法器设计技术研究
7.
The Design of High Speed Pipeline Floating Point Multiplier Based on FPGA
基于FPGA的高速流水线浮点乘法器设计
8.
Design and Implementation of Single-precision Floating Point Multiplier Based on Verilog
基于VeriIog的单精度浮点数乘法器的设计与实现
9.
In a floating-point representation, the numeral that is multiplied by the exponentiated implicit floating-point base to determine the real number represented.
浮点表示法中的一个数字，该数字乘上隐式的浮点底数的幂就决定了所表示的实数。
10.
Fluorescence Discrimination Technique Based on Weighted Nonnegative Least-squares for the Phytoplankton in the Coastal Waters;
基于加权非负最小二乘法的近海浮游植物荧光识别测定技术
11.
The Design of Fast 1 s-complement Adder Base on IEEE754 Standard Floating-point Number;
基于IEEE754浮点数的快速反码加法器设计
12.
The realization of the fast adder-subtracter for the 23 bit’s floating point numbers by VHDL
用VHDL实现的23位快速浮点数加减法器
13.
composite post adjustment multiplier
综合工作地点差价调整数乘数
14.
Multiplication and addition are associative operations.
乘法和加法是结合性运算。
15.
Multi-Sensor Information Fusion Study Based on Partial Least Squares Technique
基于偏最小二乘法的多传感器信息融合研究
16.
Pan-sharpening Algorithm Based on Constrained Least Squares of Optical Remote Sensing Images
基于约束最小二乘的光学遥感图像融合
17.
Research on data fusion algorithm of redundancy information based on least square method
基于最小二乘法的冗余信息数据融合算法实现
18.
Study on Embryogenic Suspension Culture and Protoplast Fusion of Poplar;
杨树胚性悬浮细胞系建立与原生质体融合研究