1.
Design and Research of Reconfigurable Hardware Accelerator Unit Based on Memory Bus;
基于存储总线的可重构硬件加速部件研究与设计
2.
Study and Simulation on Memory-Coupled Reconfigurable Hardware Accelerative Device;
面向存储器级耦合的可重构硬件加速部件的研究与模拟
3.
Design and Analysis of Re-configurable Multimedia Hardware Accelerator Using UML2.0;
使用UML2.0的可重构多媒体硬件加速器设计与分析
4.
Hardware Design of Fast Reconfigurable S-box Based on Genetic Algorithm
基于遗传算法的快速可重构S盒硬件设计
5.
Distinction of Soft and Hardware Component for the Reconfigurable Router
可重构路由器中软件构件和硬件构件的划分
6.
Abstract This paper describes the design principle for Intelligent angular speed and angular acceleration sensor and the main software design and hardware seructure are presented also.
本文着重于介绍智能化角速度、加速度传感器的软件设计原理和硬件结构.
7.
The Parallel Hardware Architecture of Gaussian Elimination in Reconfigurable Computing System
可重构系统中快速高斯消元算法的并行硬件体系实现
8.
A reconfigurable Hardware Architecture of Intra Prediction in H.264
一种可重构的H.264帧内预测硬件结构
9.
Implementation Research of Reconfigurable Hardware Based-on FPGA
基于FPGA的可重构硬件实现技术研究
10.
Reconfigurable Hardware Realization of Neural Network Based on FPGA
基于FPGA的神经网络硬件可重构实现
11.
The Hardware Implementation of the Information Retrieval Acceleration Based on the Embedded Chip Multiprocessor;
基于嵌入式异构多核的信息检索硬件加速实现
12.
Surface Mesostructure Modeling and Hardware-Accelerated Rendering Techniques Research;
表面细节结构建模及硬件加速渲染技术研究
13.
Relevant Technology Study on Programmable Graphics Hardware;
基于可编程图形硬件加速的若干技术研究
14.
Adds new licenses or re-installs licenses on the same hardware.
添加新许可证或在相同硬件上重新安装许可证。
15.
"Hardware components for high-speed, high-capacity optical networks "
高速、高容量光纤网络的硬件部件
16.
Research on the Hardware-Software Code Partition Technology of Reconfigurable Computing Systems;
可重构计算系统中软硬件代码划分技术研究
17.
Design and Verification of an On-Board Reconfigurable Computer SoC;
星载可重构计算机系统集成与软硬件验证研究
18.
The Research of Operating System with Transparent Programming Support for Reconfigurable Device;
支持可重构硬件透明编程的操作系统研究