1.
The Charge Pump's Influence on Phase Noise of Fractional-N PLL
电荷泵对小数分频锁相环相位噪声的影响
2.
Design and Simulation of the Fractional-N PLL Frequency Synthesizers Based on Simulink;
基于Simulink的小数-N分频锁相频率合成器设计与仿真
3.
Study of Fractional-N Digital Phase Locked Loop Frequency Synthesizer;
分数分频数字锁相频率合成器的研究
4.
Analysis and Application Design of RF PLL Frequency Synthesizer;
射频锁相环频率合成器的分析与设计
5.
Analysis and Design of RF Oscillator and PLL Architecture;
射频振荡器与锁相环结构分析与设计
6.
Design of a Fully Differential 1GHz CMOS PLL Frequency Synthesizer;
全差分1GHzCMOS锁相环频率综合器设计
7.
Design of Frequency Scanner Based on Delta-Sigma Fractional-N PLL LMX2471
基于小数分频数字锁相环LMX2471的扫频仪设计
8.
Phase Noise Analysis and Simulation of PLL Frequency Synthesizer
锁相式频率合成器相位噪声分析与仿真
9.
Construction of Experimental Platform for the Design and Performance Analysis of PLL Frequency Synthesizer;
锁相频率合成器系统设计与性能分析实验建设
10.
Analysis of the Magnitude Frequency Responses of Software Phase-Locked Loop and Its Loop Filter
软件锁相环环路滤波器和闭环幅频响应分析
11.
High dynamic synchronization algorithm based on modified frequency-locked and phase-locked
基于改进锁频锁相的高动态同步算法
12.
The phase jitter of output signal of the PLL( phase locked loop) frequency doubler is analyzed.
定量分析了数字式锁相倍频器输出信号的相位抖动.
13.
Effect of Digital Frequency Dividers on Spurs and PM Noise in PLL
锁相环中数字分频器对输出信号相位噪声和杂散的影响
14.
Behavior Modeling of PLL and Its Application in Video Horizontal PLL
锁相环行为级建模及在视频行锁相中的应用
15.
Improvement of Phase-locking Moiré Fringe Subdivision Method Using Frequency Multiplication Technology
乘法倍频对锁相式莫尔条纹信号细分方法的改进
16.
A PLL Frequency Synthesizer with High Multiple-Frequency
一种多倍频选择的高倍频锁相环频率合成器
17.
A Low Phase Noise Ka Band PLL Source with High Stability
高稳定低相噪Ka波段锁相频率源设计
18.
An X band Low Phase Noise Wideband Frequency Synthesizer
X波段宽带低相位噪声混频锁相频率源