1.
Research on the Turbo, LDPC Encoding/Decoding and Implementation of LDPC Decoding;
Turbo、LDPC编译码研究及LDPC码译码实现
2.
FPGA Implementation of SOVA-Based Turbo Decoder;
Turbo码SOVA译码器FPGA实现
3.
Convolution Code of the Viterbi Decoding FPGA to Achieve
卷积码Viterbi译码的FPGA实现
4.
The Software Realization of Shortened Cycle Code(26,16) Encoding and Decoding
缩短循环码(26,16)编码和译码的软件实现
5.
Design and implementation of a high-throughput decoder for multi-rate LDPC code
多码率LDPC码高速译码器的设计与实现
6.
Optimized Decoder Design and Implement for High Rate LDPC Codes
高码率LDPC码译码器的优化设计与实现
7.
High-Speed Viterbi Decoder on FPGA;
高速Viterbi译码器的FPGA实现
8.
Implementation of FPGA for RS(255,247) Decoder
RS(255,247)译码器的FPGA实现
9.
The Study and Implementation of LDPC Coding & Decoding Arithmetic;
LDPC码编译码算法的研究与实现
10.
Research on Encoder and Decoder of Turbo Codes and Its Implementation with FPGA;
Turbo码编译码器的研究及其FPGA实现
11.
The Implementation of Turbo Coding and Decoding System Based on DSP;
基于DSP的Turbo码编译码器的实现
12.
FPGA Decoder Implementation for Quasi-Cyclic Low-Density Parity-Check Codes;
准循环低密度校验码译码器的FPGA实现
13.
The Decoding Algorithm of TPC and Realization;
Turbo乘积码的译码算法及FPGA实现
14.
Implementation of TCM Design Based on FPGA;
基于FPGA的网格编码与译码设计的实现
15.
Theory Research and Decoder Simulation Platform Realization of LDPC Codes;
LDPC码理论分析和译码仿真平台的实现
16.
Research on Encoder and Decoder for Turbo Codes with FPGA;
Turbo码编译码以及其FPGA实现的研究
17.
The Decoding Research and Hardware Implementation of LDPC Codes Based on FPGA;
基于FPGA的LDPC码译码研究与硬件实现
18.
Research on Turbo Decoding Algorithm and FPGA Implementation;
Turbo码译码算法研究及其FPGA实现