1.
Research on SPM's Energy Model for Low Power Compilation
用于低功耗编译的SPM部件功耗模型研究
2.
Low-Power Techniques for Architecture and Compiler Optimization;
低功耗技术研究—体系结构和编译优化
3.
Low Power Design for Viterbi Decoder;
Viterbi译码器的低功耗设计
4.
Research and Design for DSP Low Power On-Chip Buses Encoding;
DSP片上总线低功耗编码的研究与设计
5.
Compiler-based Improvements to Register Allocation Strategies;
基于编译的寄存器分配性能与功耗优化策略
6.
Compiler Design for VLIW DSP with Performance and Power Consumption Optimizations;
VLIW DSP编译器设计及性能与功耗的优化研究
7.
Long Constraint Length Viterbi Decoder Hardware Design and Implement with Low-power Design Technology;
大约束度Viterbi译码器的低功耗硬件设计与实现
8.
Method of Low Power Mixing Address Coding in Wireless Sensor Networks
无线传感器网络低功耗混合地址编码算法
9.
Research and Design of a High-efficiency and Low-consumption Bit-plane Encoder
一种高速低功耗位平面编码器的研究与设计
10.
Estimation of Distribution Algorithms Based FSM Low Power State Encoding
基于分布估计算法的FSM低功耗状态编码
11.
Design of low power priority coder based on multi-threshold technique
基于多阈值技术的低功耗优先编码器设计
12.
A Coding Method of Low Energy Consumption in Wireless Visual Sensor Networks
一种低功耗无线视频传感器网络编码方法
13.
A novel adaptive-offset bus encoding method was presented for reducing the power dissipation of highly capacitive memory address bus.
为了降低大负载地址总线的功耗,提出了一种新的低功耗自适应偏移量总线编码方法.
14.
The Design and Implementat of a Low-Power Field-Programmable Analog Filter
一种低功耗现场可编程模拟滤波器的设计与实现
15.
Improve Test Compression Ratio and Reduce Test Power of EFDR Codes by Scan Chain Reconfiguration
用扫描链重构来提高EFDR编码的测试压缩率和降低测试功耗
16.
The result shows that this device has low programming power, big programming window, low read voltage, small cross talk between bits.
研究结果表明该器件具有编程功耗低、编程窗口大、读取电压低、比特间串扰小等特点。
17.
MCU Low-Power Design Technology and Its Power Analysis;
MCU低功耗设计技术及其功耗分析
18.
Pragmatic Translation and Adaptation--In the Perspective of Functionalist Approaches
实用翻译与编译——功能翻译理论视角