1.
On the Application of Hypo-state Karnaugh Map in the Analysis and Design of Time-Sequence Logic Circuit;
次态卡诺图在时序逻辑电路分析和设计中的运用
2.
The Analysis and Design of the Pulse Asynchronous Tune Sequencing Logic Circuit;
脉冲异步时序逻辑电路的分析与设计探讨
3.
An Analysis of the Application of Comparison in the Sequential Logical Circuit Teaching;
浅析比较法在时序逻辑电路教学中的应用
4.
Application of Minor State of Karnaugh Map in Logical Circuit of Time Sequence;
次态卡诺图在时序逻辑电路中的应用
5.
One Way to Design Scheduling Logic Circuit Based on MSI;
基于MSI的时序逻辑电路设计方法
6.
SIMPLIFIED WAY TO SOLVE TWO PROBLEMS IN SEQUENTIAL CIRCUIT;
时序逻辑电路中两个问题的简化处理
7.
Experiment Teaching Exploration of Sequential Logic Circuit Based on Matlab
基于Matlab的时序逻辑电路的实验教学探索
8.
"Analysis" Design Combination of Logic Circuits;
用“分析法”设计组合逻辑电路的探讨
9.
Implementation of Flip-flop Circuit within Digital Logic Analyzer Based on FPGA;
数字逻辑分析仪中触发电路的FPGA实现
10.
Applications of Combined Karnaugh Map in Analysis of Logic Circuits
联合卡诺图在逻辑电路分析中的应用
11.
The application of a logic analyzer in analyzing microprocessor time sequencing;
逻辑分析仪在微处理器时序分析中的应用
12.
In fact, we use the digital way directly to synthesize sine wave.
数字电路技术课程的知识难点是时序逻辑电路的设计。
13.
Description and Analysis of WS Security Based on Temporal Logic;
基于时序逻辑的Web服务安全形式化描述与分析
14.
field programmable logic integrated circuit
现场可编程序逻辑集成电路
15.
field programmable logic family
现场可编程序逻辑集成电路系列
16.
An Automated Soft Error Rate Analysis Platform for Combinational Logic Circuits
组合逻辑电路的软错误率自动分析平台
17.
Analysis of Open-phase Fault
输电线路非全相再故障保护动作逻辑的分析
18.
The analysis and designation on the assembly logic circuit is one of the important content of digital circuit.
组合逻辑电路的分析设计是数字电路重点内容之一。