1.
A novel design approach of clock recovery circuit used in optical communication
一种用于光通信的新型时钟提取电路设计
2.
Clock Extraction Study and Phase Shift Control Circuit Design Based on 160Gbit/s OTDM Transmission System
160Gbit/s OTDM传输系统中时钟提取的研究和相移器控制电路设计
3.
ECL Sequential Circuits Design Based on Parallel-Or Clock Structure;
基于并联取小时钟结构的ECL时序电路设计研究
4.
Design of Clock Generation and Drive Circuits in High Speed CIS System
高速CIS时钟发生电路及驱动电路设计
5.
Trigger circuit, power supply circuit, clocking circuit and reset circuit are the main circuits on the main board.
触发电路、供电电路、时钟电路、复位电路是主板上最主要的电路。
6.
Research of Clock Withdraws in the SDH Transmission Network;
SDH传输网中时钟提取技术的研究
7.
Design of DPLL for Bit Synchronous Clock Based on FPGA
基于FPGA的提取位同步时钟DPLL设计
8.
Clock acquisition for wavelet-based multirate modulation in AWGN channels
AWGN信道下小波多速率调制的时钟提取
9.
Simultaneous all-optical individual channel clock extraction and wavelength conversion using an optically injected Fabry-Perot laser diode
基于光注入Fabry-Perot半导体激光器实现同步全光分路时钟提取与波长转换
10.
The Data and Clock lines are both open collector.
数据和时钟线都是集电极开路的。
11.
The sampling clock generator must also have adequate spectral purity.
时钟发生电路固有的抖动应该足够小。
12.
Analysis of the Clock Skew in ASIC Design
专用集成电路设计中的时钟偏移分析
13.
The Design of 1GHz Clock Circuit with FPGA;
基于FPGA的1GHz时钟电路设计
14.
Design of 2.5GHz Full Speed Clock and Data Recovery Circuit
2.5GHz全速率时钟数据恢复电路的设计
15.
Research and Design of High Speed Clock Recovery Circuit on ASIC
高速时钟恢复电路的ASIC研究与设计
16.
Designing 2T-SRAM and Improving Refresh Clock Circuit
2T-SRAM设计及其刷新时钟电路的改进
17.
An Example of Radiated Emission Improvement of Clock Circuit on PCB
PCB板上时钟电路的辐射超标实例
18.
Temperature Adaptive Refresh Circuit of DRAM
温度自适应性DRAM刷新时钟电路