1.
FPGA Design of Multiply-accumulate Module in Image Compression Algorithm Based on BP Neural Network
BP神经网络图像压缩算法乘累加单元的FPGA设计
2.
Design and Implementation of the Asynchronous Sub-Word Parallel MAC Unit
异步子字并行乘累加单元的设计与实现
3.
In other words, F respects addition, multiplication and identity element.
换言之，F保持加，乘法和单位元。
4.
Design of a 3-stage Pipelined Modular Multiplication and Addition Unit for ECC
一种适合ECC的三级流水模乘加单元设计
5.
Tip of the Day: If you want to add a comment to a cell, choose Comment from the Insert menu.
日积月累：使用“插入”菜单中的“附注”命令，可为单元格添加说明文字。
6.
Addition, subtraction, multiplication, and division are binary operations.
加、减、乘、除都是二元运算。
7.
Design of a LU Decomposition Accelerator Based on High-Precision Multiplying and Accumulating
基于高精度乘累加的LU分解加速器的设计
8.
High Performance MAC Design in MCU;
在微控制器（MCU）中的高效乘法累加器的设计
9.
This moves the carry into bit position of the accumulator.
把进位移到累加器的位元。
10.
Click the cells in your document that contain the numbers you want to multiply.
单击文档中含有要乘以的数字的单元格。
11.
Optimal solution on weighted total least absolute deviations
关于多元加权全最小一乘法的最优解
12.
Hopf bifurcaion of a multiplier-accelerator model with progressive income tax and parameter interval of limit cycle existence;
累进所得税的乘数-加速模型的Hopf分支与极限环存在的参数区间
13.
Secondly, in the design of accumulator, a triplet data structure is used and can reduce much amount of accumulator.
在累加器设计上,应用了三元组数据结构, 压缩了累计器的数量。
14.
The Preliminary Discussion of the Passenger Car Bussiness Unit of Dongfeng Motor Corporation;
东风汽车公司乘用车业务单元国际化战略初探
15.
RLS Algorithm on Array Antenna with Failure Cells;
阵列天线单元失效的递推最小二乘算法应用
16.
multielement prestressing
多单元构件预加应力
17.
terminal heating & cooling units
终端加热和冷却单元
18.
vertical turner flexible machine cell
立式车削柔性加工单元