1.
Research on 32 Bit High-Speed Floating-Point Multiplier Design;
32位高速浮点乘法器设计技术研究
2.
The Design of High Speed Pipeline Floating Point Multiplier Based on FPGA
基于FPGA的高速流水线浮点乘法器设计
3.
Design and Implementation of Single-precision Floating Point Multiplier Based on Verilog
基于VeriIog的单精度浮点数乘法器的设计与实现
4.
floating-point adder
浮点加法器，浮点加
5.
In a floating-point representation, the numeral that is multiplied by the exponentiated implicit floating-point base to determine the real number represented.
浮点表示法中的一个数字，该数字乘上隐式的浮点底数的幂就决定了所表示的实数。
6.
The Research and Implementation of Double Data-path Fused Floating Point Multiply-Add Supporting Parrall Multiply;
支持并行整数乘的双通路浮点融合乘加结构的研究与实现
7.
The Design of Floating-Point Multiply-Add Fused Units in General Purpose Processors;
高性能通用处理器中浮点乘加部件的设计
8.
Research and Realization of a 128-Bit Multiply-Add-Fused Unit
一种128位高精度浮点乘加部件的研究与实现
9.
Analysis of Lagrange Multiplication;
对Lagrange乘数法的两点浅析
10.
To convert(data)from fixed - point notation to floating - point notation.
浮动把（数据）从定点数表示法改为浮点数表示法
11.
Algorithm and Circuit Design of Floating-Point Division and Square Root;
浮点除法/开方算法研究与电路设计
12.
Fluorescence Discrimination Technique Based on Weighted Nonnegative Least-squares for the Phytoplankton in the Coastal Waters;
基于加权非负最小二乘法的近海浮游植物荧光识别测定技术
13.
24 Fixed-point DSP Parallel Multiplier Design;
基于24位定点DSP的并行乘法器的设计
14.
Simulation Study on the Power of Least-squares Test for Detecting Multiple Breaks
最小二乘法对多变点检验的性能研究
15.
Infrared Point Target Detection Based on Kernel Least Squares Algorithm
核最小二乘算法检测红外点目标(英文)
16.
Saddle Point Theorem and its Applications in the Method of Lagrange Multiplier
鞍点定理在Lagrange乘数法上的应用
17.
Implementation of 20×18 bit Sign Fix Point Multiplier Based on FPGA
20×18位符号定点乘法器的FPGA实现
18.
A Novel Method of Confirming the Boarding Station of Bus Holders
一种新的公交乘客上车站点确定方法