1.
Grinder measure and control system based on improved phase-locking subdivision method
基于改进的锁相细分方法的磨床测控系统
2.
Improvement of Phase-locking Moiré Fringe Subdivision Method Using Frequency Multiplication Technology
乘法倍频对锁相式莫尔条纹信号细分方法的改进
3.
Study of Fractional-N Digital Phase Locked Loop Frequency Synthesizer;
分数分频数字锁相频率合成器的研究
4.
ANALYSIS AND DESIGN OF STEP MOTOR PHASE LOCKING CONTROL SYSTEM
步进电机锁相控制系统的分析和设计
5.
Design of Novel Fully-differential Charge Pump for PLL;
锁相环用新型全差分CMOS电荷泵设计
6.
Analysis and Design of RF Oscillator and PLL Architecture;
射频振荡器与锁相环结构分析与设计
7.
Analysis and Application Design of RF PLL Frequency Synthesizer;
射频锁相环频率合成器的分析与设计
8.
600MHz High-Performance Programable Phase-Locked Loop Design and Analysis;
600MHz高性能可编程锁相环设计与分析
9.
Design of a Fully Differential 1GHz CMOS PLL Frequency Synthesizer;
全差分1GHzCMOS锁相环频率综合器设计
10.
Modeling and Simulation of PLL Based on PSpice;
锁相环的PSpice建模与仿真分析
11.
Analysis on the Nonlinear-property of Two-order SPLL based on Matlab
基于Matlab的二阶取样锁相环非线性分析
12.
The Implementation and Analysis of Digital Phase-locked Loop Based on FPGA
基于FPGA的数字锁相环实现与性能分析
13.
Application of Phase-locked Loop Circuit CD4046 in Power Quality Analyzer
锁相环CD4046在电能质量分析仪中的应用
14.
EBPSK Demodulation Analysis Based on Second-order Phase Locked Loop
二阶锁相环的EBPSK信号解调分析
15.
Non-linear Analysis of Second-order Phase-locked Loop by Phase Plain Approach in Numeric Domain
二阶锁相环路的数字域相图法非线性分析
16.
Relationship Analysis between PLL Phase Noise and PLL Bandwidth
锁相环相位噪声与环路带宽的关系分析
17.
Phase Noise Analysis and Simulation of PLL Frequency Synthesizer
锁相式频率合成器相位噪声分析与仿真
18.
The Charge Pump's Influence on Phase Noise of Fractional-N PLL
电荷泵对小数分频锁相环相位噪声的影响