1.
The Research of NCL Circuit Computing Targeted at Block Cipher Processing
基于NCL电路的分组密码处理技术研究
2.
Reconfigurable Clustered Architecture of Block Cipher Processor
分组密码处理器的可重构分簇式架构
3.
The Research of Extending the Instructions for Dealing with the Symmetric-key Cryptography Based on RISC Microprocessor;
RISC架构微处理器扩展对称密码处理指令的研究
4.
Research and Implementation on Key Technologies of Programmable Cryptographic Processors;
可编程密码处理器关键技术研究与实现
5.
The Research of Reconfigurable Computing Targeted at Block Cipher Processing;
面向分组密码处理的可重构设计技术研究
6.
Parallel Co-processor Architecture Research and Instrcution System Design for Block Ciphers;
并行分组密码处理结构研究及指令系统设计
7.
The Research of Bit Permutation Networks and Applications in Cryptographic Processors;
比特置换网络及其在密码处理器中的应用研究
8.
Research and Design of Reconfigurable Computing Targeted at Block Cipher Processing
可重构分组密码处理结构模型研究与设计
9.
Shall be responsible for all computer transactions that are made with his/ her User ID and password.
要为所有使用其用户名和密码处理的计算机事务负责。
10.
Research and Design of Sequence Cipher Reconfigurable Processing Architecture
序列密码可重构处理结构研究与设计
11.
A High-performance Model Oriented to PCI Crypto Card
面向PCI密码卡的一种高效处理模型
12.
ASIC design of a high-speed reconfigurable RSA cryptography coprocessor
高速可配置RSA密码协处理器的ASIC设计
13.
Information processing--Modes of operation for a 64-bit block cipher algorithm
GB/T15277-1994信息处理64bit分组密码算法的工作方式
14.
Research and Design of RSA Public-Key Cryptographic Coprocessor;
可扩展的RSA公钥密码协处理器研究与设计
15.
The Design and Application of a Reusable Block Cipher Coprocessor;
可重用分组密码协处理器的设计与应用
16.
Design and Implementation of High Performance Coprocessors for Public Key Cryptographic Algorithms;
高性能公钥密码协处理器的设计与实现
17.
The reconfigurable processing architecture design of the FSR+NLF type sequence cipher over GF(2)
GF(2)域上FSR+NLF类序列密码可重构处理结构设计
18.
Design of Reconfigurable Processing Architecture for a Kind of Hybrid Encryption Based on Both Sequence and Block Ciphers
一类序列与分组混合密码可重构处理结构设计