1.
Modeling and Design of Charge Pump Phase-Locked Loops;
电荷泵锁相环的模型研究和电路设计
2.
The Design of Digital Circuits in CMOS Charge-Pump Phase-Locked Loop;
CMOS电荷泵锁相环中的数字电路设计
3.
The Research and Design of CMOS Charge-Pump Phase-Locked Loop;
CMOS电荷泵锁相环的研究与设计
4.
622MH_z CCPLL Design of 0.6μm CMOS Technics;
0.6μmCMOS工艺622MH_z电荷泵锁相环的设计
5.
Design and Analysis of CMOS Integration CPPLL;
CMOS集成电荷泵锁相环的设计与研究
6.
The Research and Design of CMOS High-powered Electric Charge Pump PLL;
CMOS高性能电荷泵锁相环的研究与设计
7.
622MHz Charge Pump PLL Design of Basing on CMOS Technics;
基于CMOS工艺的622MHz电荷泵锁相环设计
8.
Design of a Charge Pump Phase-Locked Loop for Frequency Synthesizer
用于频率合成器的电荷泵锁相环设计
9.
A Design of Charge-Pump Phase Lock Loop Based on CMOS Technics
基于CMOS工艺的电荷泵锁相环的设计
10.
Design of 622MHz CPPLL Based on 0.18μm CMOS Technology
0.18μm CMOS工艺622MHz电荷泵锁相环设计
11.
Design of 2.5GHz CPPLL Based on 0.18μm CMOS Process
基于0.18μm CMOS工艺2.5GHz电荷泵锁相环的设计
12.
The Design of Charge Pump PLL Frequenc Synthesizer
一种电荷泵锁相环频率合成器的设计
13.
An Improved CMOS Charge Pump PLL design
一个改进型CMOS电荷泵锁相环的设计
14.
Design of a CMOS Charge-Pump PLL and Investigation of the Phase Noise;
CMOS电荷泵锁相环的设计及相位噪声的研究
15.
Design and Analysis of Low Noise Charge Pump Phase-Locked Loop Circuit;
低噪声电荷泵锁相环电路设计理论与技术
16.
The Theory Research and Circuit Design of CMOS Integrated Charge-Pump Phase Lock Loop
CMOS集成电荷泵锁相环的理论研究与电路设计
17.
Design of a Charge-Pump Phase-Lock-Loop Used for HDMI Transmitter;
一种用于HDMI发送端接口的电荷泵锁相环设计
18.
Research and Development of the CPPLL and Its IP Core Realization;
电荷泵锁相环设计及其IP实现技术研究