1.
The Charge Pump's Influence on Phase Noise of Fractional-N PLL
电荷泵对小数分频锁相环相位噪声的影响
2.
Design of Frequency Scanner Based on Delta-Sigma Fractional-N PLL LMX2471
基于小数分频数字锁相环LMX2471的扫频仪设计
3.
Study of Fractional-N Digital Phase Locked Loop Frequency Synthesizer;
分数分频数字锁相频率合成器的研究
4.
Analysis and Application Design of RF PLL Frequency Synthesizer;
射频锁相环频率合成器的分析与设计
5.
Design and Simulation of the Fractional-N PLL Frequency Synthesizers Based on Simulink;
基于Simulink的小数-N分频锁相频率合成器设计与仿真
6.
Effect of Digital Frequency Dividers on Spurs and PM Noise in PLL
锁相环中数字分频器对输出信号相位噪声和杂散的影响
7.
Analysis and Design of RF Oscillator and PLL Architecture;
射频振荡器与锁相环结构分析与设计
8.
Design of a Fully Differential 1GHz CMOS PLL Frequency Synthesizer;
全差分1GHzCMOS锁相环频率综合器设计
9.
Analysis of the Magnitude Frequency Responses of Software Phase-Locked Loop and Its Loop Filter
软件锁相环环路滤波器和闭环幅频响应分析
10.
Study on Key Techniques of Digital Up/Down Conversion and Digital Phase-Lock-Loop;
数字上下变频及全数锁相环关键技术研究
11.
Digital Tuning System of Color TV PLL Frequency Synthesis
锁相环频率合成方式的彩电数字调谐系统
12.
Design of Temperature Frequency Conversion Circuit Based on Digital Phase Locked Loop;
基于数字锁相环的温控变频电路的设计
13.
Automatic Modulus Controlled All Digital Phase Locked Loop with Large Lock-in Range
一种自动变模控制的宽频带全数字锁相环
14.
A New Type ADPLL Used in High-Frequency Induction Pyrogenation System
全数字锁相环高频感应加热系统的设计
15.
The Implementation and Analysis of Digital Phase-locked Loop Based on FPGA
基于FPGA的数字锁相环实现与性能分析
16.
Non-linear Analysis of Second-order Phase-locked Loop by Phase Plain Approach in Numeric Domain
二阶锁相环路的数字域相图法非线性分析
17.
A High Data-rate Telemetry Transmitter Based on Fractional-N PLL
一种基于小数锁相环的高速遥测发射机
18.
Behavior Modeling of PLL and Its Application in Video Horizontal PLL
锁相环行为级建模及在视频行锁相中的应用