1.
Multi-Grain Parallel H.264 Encoder for Homogeneous Multi-Core Architectures
基于同构多核处理器的H.264多粒度并行编码器
2.
FPGA Implementation of a Novel Parallel Turbo Encoder/Decoder;
一种新型并行Turbo编译码器的FPGA实现
3.
An Achievement on FPGA of CRC-16 Encoder with 32 Bits Parallel Data;
32位并行数据的CRC-16编码器的FPGA实现
4.
The H.264 Video Parallel Codec Based on GPU
基于GPU的H.264视频并行编解码器
5.
Study and Implementation of AVS Encoding Algorithm Based on Slice Parallel
AVS编码器Slice并行处理算法研究与实现
6.
A parallel architecture design of CAVLC encoder in H.264
H.264中并行化的CAVLC编码器架构设计
7.
The CODEC can be used to carry on coding transmission and decoding reception in parallel with code error detection and bit synchronized signal recovering.
该编译码器能进行并行发送编码和接收译码,并带有误码检测和位同步提取的功能。
8.
Study and Implementation of Parallel Algorithm in H.26L Video Encoder;
H.26L视频编码器并行性算法研究与实现
9.
The Design and Implement of Parallel MPEG-4 Video Encoder Based on MDSP
基于MDSP的并行MPEG-4视频编码器的设计与实现
10.
Survey of Parallel Acceleration Algorithms of Video Coding on Multi-core Processor
面向多核处理器的视频编码并行加速算法综述
11.
The requested codec has been acquired and installed.
已获取并安装了所请求的编码解码器。
12.
A cross-compiler runs on a host computer and produces object code for the target.
交叉编译器在主机上运行并且产生目标机的目标代码。
13.
A transcoder for transcoding digital video signals includes a decoder and an encoder.
一种转换编码器，用以转换编码数位视讯，并包含一个解码器及一个编码器。
14.
Parallel Algorithm Design and Optimization for H.264 Video Encoding;
H.264并行编码算法的研究和优化
15.
Research on FPGA Implementation of a Multi-bit-plane Parallel Algorithm for Image Coding;
位平面并行的CCSDS编码研究及其FPGA实现
16.
VLSI Architecture of Multi-bit Parallel MQ Coder
多位并行MQ编码的VLSI结构研究
17.
A CABAC Parallel Encoding Method for Multithreading
基于多线程的CABAC并行编码方法
18.
Research on Parallel Coding of H.264 Based on BF561
基于BF561的H.264并行编码的研究