1.
Designing Electronic Circuits Using Evolutionary Algorithms and Their Parallelization;
电子电路并行演化算法的设计与实现
2.
The Study of Parallel Architecture in Application Specific Integrated Circuit and Practices in Video Decoder Chip Design;
专用集成电路并行结构研究及其在视频解码芯片设计中的实践
3.
parallel processing system evaluation board
并行处理系统评价电路板
4.
STE Verification Method for Concurrent Behaviors in Digital Circuit;
数字电路并发行为的STE验证方法
5.
Research on High Speed PCB of 10Gbit/s Parallel Optical Transmitter Module;
10Gbit/s并行光发射模块高速电路研究
6.
Simulation of Electromagnetic Induction between Parallel AC and DC Transmission Lines;
交流输电线路对并行直流输电线路电磁感应的仿真研究
7.
Design of Parallel Current Equalizer for High Switching Power Supply
大功率开关电源并联运行时均流电路设计
8.
CAMAC parallel highway
ＣＡＭＡＣ并行信息公路
9.
The parallel form of the input sequence is decoded by means of a logical decoding circuit.
此并行形式序列通过逻辑解码电路输入。
10.
Design of a Circuit Synchronizing the Byte Clock with the Parallel Data in the Deserializer
接收器中并行数据与字节时钟同步的电路设计
11.
15-40Gb/s High Speed Parallel Front-End Amplifiers for Optical Receiver Design;
15-40Gb/s CMOS高速并行光接收前端放大电路设计
12.
6 Bit Super Speed Flash ADC Design;
6比特超高速全并行模数转换集成电路设计
13.
Design of the High-Speed Parallel Frame Alignment in VSR System;
甚短距离光互联系统高速并行帧同步电路设计
14.
Massive Parallel Test Strip Handler Design for Logic Devices Final Test;
密集型集成电路条式并行测试机的设计及研究
15.
Readout and signal processing system for two-element parallel CdZnTe detectors
二元并行CdZnTe探测器读出电路及信号处理方法
16.
An area-efficient parallel BCH decoder supporting foresighted error search
一种支持预搜索的面积紧凑型BCH并行译码电路
17.
Research of Electromagnetic Interference from Power Lines to a Nearby Underground Metallic Pipeline;
电力线路对邻近并行埋地金属管道电磁干扰影响的研究
18.
Research on the Total Electric Field under the Parallel HVDC and HVAC Power Lines;
并行的高压交直流输电线路合成电场的计算研究