1.
The RTL design and FPGA implementation of OPB arbiter device
OPB总线仲裁器的RTL设计与FPGA实现
2.
The Summary of Doing Synthesizable By Using Design Compiler
用Verilog HDL进行可综合RTL设计概述
3.
RTL Design of Stand-Alone CAN Bus Controller;
独立CAN总线控制器的RTL级设计
4.
Prototype Design of Algorithms, Used in a VFC Chip and RTL Implementation Its Scaling Module;
视频芯片算法原型设计及Scaling模块RTL实现
5.
RISC Architecture Based Processor Design and RTL-Level Implementation;
基于RISC体系结构的处理器设计与RTL级实现
6.
Research on Techniques of VLSI RT-Level Automatic Functional Vectors Generation;
VLSI RTL级模拟矢量自动生成技术研究
7.
RTL Power Analysis and Optimization with Function Simulation;
基于功能仿真的RTL功耗分析及优化
8.
Register Transfer Level Coverage-Driven Verification of External Memory Interface;
RTL级基于覆盖率驱动EMI的验证
9.
RTL Property Checking Based on Linear Programming;
基于线性规划的RTL性质验证研究
10.
Embedded Application of LwIP based on RTL8019AS
基于RTL 8019AS的LwIP的嵌入式应用研究
11.
FPGA-Based Approach for RT Level Circuit Power Estimation
一种基于FPGA的RTL级电路功耗评估方法
12.
Test Generation Based on Behavioral Model at RT-level and Delay Testing;
基于RTL行为模型的测试产生及时延测试方法
13.
Equivalence Checking between System Level Model and RTL Implementation
系统级模型与RTL实现的等价性验证方法
14.
Research on how to use tool to do RTL synthesis
怎样能更好地应用工具进行RTL综合研究
15.
RTL Datapath Satisfiability Solving Using a Binary CSP Engine
采用二元CSP引擎求解RTL数据通路的可满足性
16.
Construction of MATCH (27,3,1) Designs
MATCH(27,3,1)—设计
17.
CADD - Computer Aided Design Device
计算机辅助设计设备
18.
Designers nominate designers.
设计师为设计师提名。