1.
Hardware Connection and Realization of Audio TLC320AD50C Based on DSP
基于DSP的音频TLC320AD50C硬件连接与实现
2.
It provides hardware linking method, baud rate calculation and communication ports initialization.
给出了两机的硬件连接方式、波特率确定和软件对通信端口的初始化。
3.
To reenable the port, disconnect the hardware and click Reset. If you click Close, the port will no longer function.
要重新启用端口，请断开硬件连接，单击“复位”。如果单击“关闭”，端口就不管用了。
4.
Shows the disk drives and hardware connected to this computer.
显示连接到此计算机的驱动器和硬件。
5.
Research of Hardware Logical Connection between TMS320C6202 and VMEbus;
TMS320C6202与VME总线的硬件逻辑连接研究
6.
Design of Hardware Interface of Isomery Computers Linked by Serial Port;
基于串口的异型机连接的硬件接口设计
7.
The total number of Serial Overrun Errors for this connection. Serial Overrun Errors occur when the hardware cannot handle the rate at which data is received.
这次连接的串连溢出错误总数。当硬件无法处理接收数据的速率时出现串连溢出错误。
8.
connectors, links, joins, joiners, information systems diagrams
连接线, 链接, 连接, 连接件, 信息系统图
9.
This wizard is searching for hardware that has been connected to your computer recently but has not yet been installed.
向导正在搜索最近连接到计算机但尚未安装的硬件。
10.
A network adapter is a hardware device that connects your computer to a network.
网络适配器是物理上将计算机与网络连接起来的硬件。
11.
A network adapter is a hardware device that physically connects your computer to a network.
网络适配器是物理上将计算机与网络连接起来的硬件设备。
12.
Please ensure that the tuner hardware is either plugged in, installed, and has a valid driver installed.
请确保调谐器硬件已连接、安装且已安装了有效的驱动程序。
13.
The HDM is the part of the driver that interfaces with the particular controller and hardware device.
HDM是指驱动程序与特定的控制器和硬件设备连接的部分。
14.
And a plug and play operating system is constantly searching each connection for new hardware.
而且一个即插即用操作系统正在不变地为新的硬件寻找每个连接。
15.
Design and Implemen of the Timer and Multi-Connection Management in TCP Protocol Processing Unit;
TCP协议的定时机制和多连接管理的硬件设计与实现
16.
Research and Implement of Automated Test of Connecting Hardware Based on Virtual Instrument;
基于虚拟仪器的连接硬件自动测试的研究和实现
17.
The Design and Implementation of Hardware Abstract Layer Connectivity on DSP/FPGA Based on Software Communications Architecture;
基于SCA的硬件抽象层连接设计及其在DSP/FPGA上的实现
18.
The system bus connects the CPU with the main memory and is separate from the buses connecting the CPU with the system's hardware peripherals.
系统总线将CPU与主存连接在一起并且和连接CPU与系统硬件外设的总线隔离开。