1.
The Implementation of TCP/IP Protocol Based on NiosII Softcore CUP;
基于NiosII软核CPU的TCP/IP协议实现
2.
Design and Realization of Embedded Information Transmiting System Based on Nios II Soft CPU;
基于Nios II软核CPU嵌入式消息转发系统的设计与实现
3.
The Design of 8-bit Turbo-51 s CPU Soft-core;
一款8位Turbo-51的CPU软核的设计
4.
Based Dual-CPU Chip DECT Protocol Software Design;
基于双CPU芯片的DECT协议软件设计
5.
Design of a CPU Core Compatible with MCS-96;
兼容MCS-96系列指令记的CPU核的设计
6.
Realizing High Performance SSL VPN Based on Multicore CPU;
利用多核CPU实现高性能SSL VPN
7.
CPU Hard Core Design Based on MCS-51 Instruction Set
基于MCS-51指令集的CPU硬核设计
8.
Research on parallel genetic algorithm on multi-core CPU
多核CPU环境下的并行遗传算法的研究
9.
The Application Research of Parallel Volume Rendering Based on Multi-Core CPU;
基于多核CPU的并行体绘制算法应用研究
10.
Design and Realization of CPU Nucleus and Virtual Platform Based on FPGA;
基于FPGA的CPU核及其虚拟平台的设计与实现
11.
Research of Video Decoding and Display of Digital TV Based on CPU with a MIPS Core;
基于MIPS核CPU的数字电视的视频解码和显示研究
12.
Research on niche hybrid genetic algorithm based on multi-core CPU
多核CPU环境下小生境混合遗传算法的研究
13.
Software running on the CPU must be able to read and write those controlling registers.
运行在CPU上的软件必须能读出或者写入这些控制寄存器。
14.
The design method for CPU control board, control program and data process software are also introduced in this paper.
论述了 CPU控制板、控制板程序、数据处理软件的设计方法。
15.
The Research and Design of the Software on Embedded Teaching Platform Based on Domestic CPU;
基于国产CPU的嵌入式教学系统软件部分的研究与实现
16.
COB Cache on board
板上集成缓存，做在CPU卡上的二级缓存，通常是内核的一半速度
17.
The Application Research of Parallel Cone-Beam Reconstruction Algorithm Based on Multi-Core CPU for Micro CT;
基于多核CPU的微型CT并行锥束图像重建算法应用研究
18.
Research on Parallel Recognition Algorithm for Cluster Structure of Complex Networks Based on Multi-core CPU
基于多核CPU的复杂网络簇结构并行识别算法研究