1.
Design of Low-Clock Jitter VCO with Strong Ability of Rejecting Power Supply Noise
高抗电源噪声的低时钟抖动VCO设计
2.
Figure 5.36 shows the relationship between sampling clock jitter and SNR previously presented.
图5.36显示了采样时钟抖动和信噪比之间的关系。
3.
Research on the Clock Jitter Effects on the Performance of GPS Tracking
采样时钟抖动对GPS信号跟踪性能影响研究
4.
Design of SDH/SONET Tributary Clock Jitter Attenuation Digital Phase Lock Loop
SDH/SONET支路时钟抖动衰减数字锁相环设计
5.
Analysis of clock jitter error in digital-to-analog converter based on Linear Frequency Modulated Signal
基于线性调频信号的数模转换器时钟抖动误差分析
6.
Error analysis on numerical double integration in acceleration measurement with clock jitter
时钟抖动下加速度测量值的数值双积分误差(英文)
7.
The sampling clock generator must also have adequate spectral purity.
时钟发生电路固有的抖动应该足够小。
8.
Analysis and Design of Low-Jitter Clock Driver for Wideband ADC
宽带ADC低抖动时钟驱动电路的分析与设计
9.
"Pulse front edge jitter (firing-time jitter, pulse starting-time jitter)"
脉冲前沿抖动(点火时间抖动、脉冲起始时间抖动)
10.
pronounce with a trill, of the phoneme .
发音素r时用抖动发出。
11.
The ADC aperture jitter must be minimal, and the sampling clock generated from a low phase-noise quartz crystal oscillator.
ADC的孔径抖动必需尽可能的小，而且要使用低相位噪声的石英晶体振荡器作为采样时钟发生器。
12.
Curiously, the chiming of the hour seemed to have put new heart into him.
怪得很，这报时的钟声仿佛让他抖擞了精神。
13.
Then, indeed, Mr. Dimmesdale shuddered, and slightly stirred.
此时，丁梅斯代尔先生确实抖了抖，微微一动。
14.
The jitter (or delay jitter) determines the maximum allowed variance in the arrival of data at the destination.
抖动（匮称延迟抖动）指的是数据到达目的地所需时间的最大偏差。
15.
The ship shuddered as she struck the rocks
船撞着礁石时强烈地抖动了一下。
16.
shudder with pleasure in a hot bath
洗热水澡时舒适得抖动起来
17.
110s is prone to camera shake.
使用110相机，容易在按快门时抖动。
18.
110s are prone to camera shake.
使用110 相机，容易在按快门时抖动。