1.
Timing Recovery in COFDM System;
COFDM传输系统的采样时钟同步
2.
Figure 5.36 shows the relationship between sampling clock jitter and SNR previously presented.
图5.36显示了采样时钟抖动和信噪比之间的关系。
3.
Research on the Clock Jitter Effects on the Performance of GPS Tracking
采样时钟抖动对GPS信号跟踪性能影响研究
4.
Design of High Accuracy Synchronous Sampling Clock in Digital Substations
数字化变电站中高精度同步采样时钟的设计
5.
Design and Application of Broadband High-Dynamic Digital Intermediate Frequency System Sampling Clock Based on AD9516
基于AD9516的宽带高动态数字中频系统采样时钟设计与应用
6.
The ADC aperture jitter must be minimal, and the sampling clock generated from a low phase-noise quartz crystal oscillator.
ADC的孔径抖动必需尽可能的小，而且要使用低相位噪声的石英晶体振荡器作为采样时钟发生器。
7.
A 2 minute bell at half-time could be introduced (just like the theatre, how posh!
半场时，有可能会（像在剧场一样）采用2分钟的铃声（多么优雅！）
8.
make a sound like a clock or a timer.
发出像时钟一样的声音。
9.
Sampling clock offset estimation algorithm based on IEEE 802.11n
基于IEEE 802.11n的采样钟偏移估计算法
10.
The interview overran by fifteen minutes.
那次采访超过规定时间十五分钟。
11.
Clock Synchronization Data Collection System Based on NIOSⅡ
基于NIOSⅡ的时钟同步数据采集系统
12.
Decrease electron-magnetic radiation by using spread-spectrum-clock generation technique
采用扩展频谱时钟技术降低电磁辐射
13.
in the same direction as the rotating hands of a clock.
与时钟指针的旋转方向一样。
14.
The High Accuracy Clock Source Adopts in the Synchronous Data Concentrated of Application;
高精度时钟源在同步数据采集中的应用
15.
TECHNICAL SCHEME AND RESULT OF HIGH ACCURACY CLOCK SYNCHRONIZATION FOR MICROTREMOR DATA ACQUISITION
微动数据采集高精度时钟同步技术方案与结果
16.
Method of Clock Phase Correction in Wide-band Data Acquisition Based on FPGA
基于FPGA的宽带数据采集时钟相位校正方法
17.
Application of Clock Distribution IC in High-speed Parallel Data Acquisition System
时钟分配芯片在高速并行数据采集中的应用
18.
the chime of church; bells/of the clock
教堂钟[时钟]的钟声.