1.
Technology Development of Microprocessor from Patent(Ⅶ) - Technology Analysis on Early Cache Patents of Intel
透过专利看微处理器的技术发展(七)——Intel早期多级Cache专利技术分析
2.
Prefetch structure of L2 Cache for multi-core multi-thread pocessor
多核多线程处理器二级Cache预取结构的设计
3.
A Coarse-Grand Cache Partitioning Technique for Multi-Programmed Workloads on CMPs
一种面向多核处理器粗粒度的应用级Cache划分方法
4.
Design and System-level Verification of Instruction CACHE Architure;
指令CACHE结构设计与系统级验证
5.
Research and Implement on three-level Cache in RAID;
RAID中三级CACHE的研究与实现
6.
The Optimation Design Two Level Cache Controller on YHFT-DX Chip
YHFT-DX片内二级Cache控制器的优化设计
7.
Design and Implementation of Level One Cache Miss Pipelining on High Performance DSP
高性能DSP一级Cache缺失流水设计与实现
8.
Full Custom Design and Realization of SRAM in L2 Cache Tag
二级Cache Tag中SRAM的全定制设计与实现
9.
The Discussion of Cache Coherence Protocol
多处理器系统cache一致性协议的探讨
10.
The Research on Shared Multi-ported Data Cache Architecture of SCMP;
SCMP中共享多端口数据Cache结构的研究
11.
Smart Multihop Promotion for Non-Uniform Cache Architecture
面向非一致Cache的智能多跳提升技术
12.
Dynamic Partition of Shared Cache in Multi-Core System
多核系统中共享cache的动态划分
13.
Selective Replication Policy in CMP Cache Hierarchy
多核处理器片上Cache的选择性复制策略
14.
A Dual-ported Variable-way L1 D-cache for DSP
用于DSP的双端口、多路可变L1 D-cache设计
15.
Analysis of Cache Coherence in Chip Multi-Processor
单芯片多处理器中Cache一致性的分析
16.
Research on Low-energy Cache and Dynamic Voltage Scaling in Architectural Level;
体系结构级低能耗Cache和动态电压缩放技术研究
17.
The Design and Implementation of High Performance DSP Level-One Data Cache Controller
高性能DSP一级数据Cache控制器的设计与实现
18.
Research and Design on Reconfigurable Cache for Multimedia Computation;
支持多媒体计算的可重构Cache研究与设计