1.
Test Generation Based on Hiberarchy Model at Register Transfer Level;
基于寄存器传输级层次模型的测试生成研究
2.
Research on RTL Fault Models and Test Generation;
集成电路寄存器传输级故障模型与测试生成研究
3.
output register
(连续)输出寄存器
4.
buffer input/output memory
缓冲器输入输出寄存器
5.
input/output register loaded
输入输出寄存器装入
6.
Advanced Design and Realization to the Tri-State-TG Register
一种改进的三态传输门寄存器的设计与实现
7.
A shift register that transfers information from stage to stage in response to timing signals.
一种移位寄存器,按定时信号逐级传送信息。
8.
load index register instruction
输入变址寄存器指令
9.
ICSR (Input Control Shift Register)
输入控制移位寄存器
10.
Information is transmitted to and from registers via buses.
信息是通过总线输入寄存器或由寄存器输出的。
11.
two stages of a ferroelectric shift registor
二级铁电移位寄存器
12.
When the integration period of the detector is complete, a series of switches closes and transfers the charge to a shift register.
但探测器的综合期完成，一系列的开关关闭，传输电荷给移位寄存器。
13.
The twenty-three(23) bits residing in the scrambler shift register prior to the transmission of a packet.
传输包之前驻留在编码器移位寄存器中的23比特。
14.
memory register
存储寄存器存储寄存器
15.
input/output interrupt request register
输入输出中断请求寄存器
16.
holding register
保持寄存器存储寄存器
17.
register-to-register transfer operation
寄存器－寄存器转移操作
18.
register-to-register arithmetic operation
寄存器－寄存器算术运算