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1.
Designing for High Precision Synchronous Clock Based on GPS-Clock
基于GPS秒时钟的高精度同步时钟设计
2.
Implementation and Design of Infrared-based Intelligent Clock;
基于红外遥控的智能时钟设计与实现
3.
The Design Process and Emulation based on AT89C51 Digital Time Unit
基于AT89C51数字时钟设计过程与仿真
4.
Designing a Font-Changeable Topmost Clock in Delphi
利用Delphi设计字体可变的浮动计时时钟
5.
SDH Equipment Clock Design and Realization Based FPGA;
基于FPGA的SDH设备时钟的设计与实现
6.
Design of Digital Phase Locked Loop Used in SDH Equipment Clock
SDH设备时钟中的数字锁相环设计
7.
Analysis of the Clock Skew in ASIC Design
专用集成电路设计中的时钟偏移分析
8.
Design of Phase-locked Loop for USB2.0 Application;
应用于USB2.0时钟数据恢复的锁相环设计
9.
The Research of Clock Tree Synthesis Methods Based on Chip Design Garfield5;
基于Garfield5设计中时钟树综合技术研究
10.
The Design of a Phase-Locked Loop Used in a DSP Clock System;
一种用于DSP时钟系统的锁相环的设计
11.
Design and Analysis of CMOS PLL Clock Generator;
CMOS锁相环时钟发生器的设计与研究
12.
Design of Clock Network Based on DLL in FPGA;