1) High-frequency clock spacing Synchronizer
高频时钟错位法
1.
Due to the deficiency of these methods,a Logic controller named "High-frequency clock spacing Synchronizer " is designed by taking advantage by means of Enable D triggerand and a high-frequency pulse from the outside introduction.
针对这些常用方法不能彻底消除亚稳态的不足,提出了一种基于使能触发器构成的"高频时钟错位法",这种方法通过从外部引入一个高频脉冲,对原来互相独立的异步时钟信号同步在高频时钟的上升沿和下降沿,并且保持半周期的时间间隔。
2) high Frequency Clock
高频时钟
1.
The Design of High Frequency Clock Circuit with FPGA;
基于FPGA的高频时钟电路设计
3) "clock place" methods
时钟定位法
4) high frequency clock circuit
高频时钟电路
5) high-rate GPS clock correction
高频GPS时钟改正
6) maximum operating clock frequency
最高时钟频率
1.
By the HSPICE simulation, the maximum operating clock frequency hasreached as high as 1.
8mmCMOS工艺、电源电压为5V的条件下,最高时钟频率达到了1。
补充资料：高频
1.无线电学上指一万五千赫兹或二万赫兹以上的电磁振荡。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条