1) clock overlap
时钟重叠
1.
The Tri-State-TG,positive edge sensitive,master-slave,register,during the clock overlap period of single-clock system,will lead to sample in the non-clock positive edge and the data output will change in the negative edge.
三态传输门正边沿主从寄存器,在单时钟系统中时钟重叠期间,会导致在非时钟上升沿期间采样,以及输出在负边沿发生变化。
2) two-phase non-overlapp-ing clock
两相非重叠时钟
3) non-overlapping clock circuit
非重叠时钟电路
4) no-overlapping clock
无交叠时钟
5) non-overlap clock
不交叠时钟
1.
The two phase non-overlap clock generator is one of the building blocks of the switch capacitor circuit.
在开关电容电路中,一个必不可少的单元便是两相不交叠时钟产生单元,它产生不交叠时钟,控制节点不会同时被两个电压驱动;产生提前关断的时钟,以减少电荷注入效应的影响。
6) clock reset
时钟重置
1.
An algorithm for adaptive detection of clock reset based on pattern recognition;
基于模式识别的自适应时钟重置检测算法
2.
,the frequency difference between two clocks,and clock reset which is the abrupt adjustment of clock at end systems.
主机之间的相对时钟频差和时钟重置会给单向时延测量引入不容忽视的误差。
补充资料：非想非非想处天
1.佛教语。即三界中无色界第四天。此天没有欲望与物质﹐仅有微妙的思想。
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参考词条