2) power optimization
功耗优化
1.
The software power optimization scheme was experimentally validated on a wide range of embedded software rou.
选用指令级能耗评估模型,提出和验证了一种基于指令聚类与指令调度的功耗优化方案。
2.
In this paper, a method of power optimization based on form of design of switch-capacitance circuit is proposed.
文中提出基于开关电容电路设计形式的功耗优化方法。
3.
Since much work has been done on power optimization techniques at all stage of the design process, this paper mainly study on how to reduce the power dissipation in logic stage of circuit design.
功耗优化技术可以在芯片设计的各个层次展开,本文主要研究如何在逻辑层降低电路功耗。
3) low-power optimization
低功耗优化
1.
With the design of complier system and optimization for its low-power in compiling, the low-power optimization strategy for VLIW instruction bus is implemented in the compiler backend.
针对编译器系统设计和编译中的低功耗优化,基于可重定向编译器,实现在编译器后端对VLIW指令总线进行功耗优化的策略。
4) Low power optimization
低功耗优化
5) area optimization
面积优化
1.
This algorithm generates timing constraints which can effectively promote the area optimization of logic synthesis.
提出了一种新的时钟偏斜规划算法,该算法所生成的时序约束可以有效地促进逻辑综合工具的面积优化。
6) area-efficient
面积优化
1.
An area-efficient design proposal of a direct digital frequency synthesizer is presented.
提出一种新的面积优化的直接数字频率合成器设计方案。
补充资料：功耗
功率的损耗。电路中通常指元、器件上耗散的热能。有时也指整机或设备所需的电源功率。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条