1) trapped instruction
![点击朗读](/dictall/images/read.gif)
设陷指令
2) trap instruction
![点击朗读](/dictall/images/read.gif)
陷阱指令
3) commander equipment
![点击朗读](/dictall/images/read.gif)
指令设备
4) software trap instruction
![点击朗读](/dictall/images/read.gif)
软件陷阱指令
5) design of microinstruction
![点击朗读](/dictall/images/read.gif)
微指令设计
6) instruction cache design
![点击朗读](/dictall/images/read.gif)
指令Cache设计
1.
This paper analyzes the traditional instruction prefetch technologies,studies a new instruction prefetch technology based on the communications between compilers and processors with the Explicitly Parallel Instruction Computing architecture, and gives a L1 instruction cache design scheme supporting several technologies.
本文分析了传统的指令预取技术,并结合显性指令并行计算(EPIC)体系结构,研究了基于编译器与处理器通信的新的指令预取技术,提出了一种支持多种预取技术的L1指令Cache设计方案。
补充资料:设陷
1.设置陷阱。
说明:补充资料仅用于学习参考,请勿用于其它任何用途。
参考词条