1) E-register
E寄存器
2) Register
[英]['redʒɪstə(r)] [美]['rɛdʒɪstɚ]
寄存器
1.
CPU register and overlapping register window tech;
CPU寄存器集的实现方法与重叠寄存器窗口技术
2.
A Successive Approximation Analog-to-Digital Converter Based on a New Register Architecture;
一种基于新型寄存器结构的逐次逼近A/D转换器
3) IEEE 1149.1 register
IEEE1149.1寄存器
4) register file
寄存器堆
1.
Design of register file of DSP based on VLIW architecture;
基于VLIW体系结构的DSP寄存器堆的设计
2.
Specifically,the cluster-oriented compiler makes the register numbers in loops as continuous as possible to offer more opportunities for run-time power management,and the cluster-based run-time power manager employs a register cluster buffer to filter accesses to the register file for dynamic power saving.
本文采用软硬件协同设计技术,提出以寄存器簇为粒度对嵌入式处理器寄存器堆进行功耗管理的方法。
3.
A multi-ported register file is often required by the superscalar microprocessor to handle multiple simultaneous loads and stores, which cause large increase in area and power consumption.
对于流水线型的超大规模微处理器,通常采用多端口的寄存器堆暂存中间数据,这些读写操作势必增加寄存器堆的芯片面积和功耗。
5) register-based device
寄存器基
1.
The interface theory of the VXI register-based device is introduced in this paper,for short, the address-refinding method by address-modifying code is also presented ,in which the finding-address method and the auto-adapting switch of the data transfer-method are achieved .
在介绍ＶＸＩ总线寄存器基器件的接口原理基础上，提出了用地址修改码再寻址的方法，实现地址寻址方式、数据传输方式自适应切换。
6) FIFO register
FIFO寄存器
1.
Three FIFO registers with 32 bits are given out,which are in original coordination with synchronous interruptable signals so that reducing demands on hardware and relieving taking up time of CPU during phase shifting timed.
介绍一种新型的全数字触发器，它突破 8位单片机位数的局限，提出的三个 32位的 FIFO寄存器，与同步中断信号有机配合，降低了对硬件的要求，又减少了移相定时过程占用 CPU的时间 。
2.
The methods about how to use FIFO register were analysed.
介绍了并行口常见的几种工作模式和ECP模式的特点以及并行口ECP协议的输入输出时序特性,说明了并行口ECP模式所使用的寄存器及端口地址;分析了FIFO寄存器的使用方法;给出在并行口ECP模式下进行双向数据传输的一个电路实例和主要的通信流程。
补充资料：寄存器
电子计算机中用来在操作时暂时存储信息的部件。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条