1) Physical Layer IP Core
物理层IP核
1.
Design of an IEEE 1394-Compliant Physical Layer IP Core;
IEEE 1394物理层IP核的设计
2) IP core interface layer
IP核接口层
3) LINK CORE IP
链路层IP核
4) Hierarchical IP cores
层次型IP芯核
5) IP Core
IP核
1.
IP core design of Russian military multi-channel serial bus based on FPGA;
多通道俄制军用串行总线FPGA的IP核设计
2.
The application of IP core-based FIR filter to digital orthogonal transformation;
基于IP核的FIR滤波器在数字正交变换中的应用
3.
Design and FPGA Implementation of a I2C Master Controller IP Core;
一种I~2C主控器IP核的设计与FPGA实现
6) IP
IP核
1.
A 32×32 Multiplier IP Using Booth Algorithm;
基于Booth算法的32×32乘法器IP核设计
2.
Since systemC language was good at behavior description,design method of behavior models and testbenchs using systemC instead of HDL in IP soft core design were introduced in this paper.
以一个通用异步收发器的IP核设计为例,详细讨论整个IP软核的设计流程,重点分析了行为模块和验证模块的设计。
补充资料：激光模拟核爆炸(见核爆炸物理摸拟)
激光模拟核爆炸(见核爆炸物理摸拟)
laser simulation for nuclear explosion
)iguang moni hebaozha激光模拟核爆炸(raser、imulation fornuclear explosion)见核爆炸物理模拟。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条