1) EPP parallel port communication
EPP并口通信
2) EPP parallel port
EPP并口
1.
Enhanced HPI-8 bootloader through EPP parallel port;
通过EPP并口实现增强型HPI-8自举引导
2.
This bridge is the core of communication of the controller system, it connects the bottom level backplane bus, backplane bus controller, and PC EPP parallel port.
该总线桥是某型协调控制器系统的通讯核心,实现了系统下层的背板总线、背板总线管理器与上位机EPP并口之间的协议转换以及通讯仲裁功能。
3) EPP
EPP并口
1.
A circuit design based on Field Programmable Gate Array(FPGA)and Enhanced Performance Profiles(EPP)for Analog-to-Digital Converter(ADC)chip test system is presented in this paper.
提出了一种基于FPGA和EPP并口的模数转换器芯片测试电路设计。
2.
A design idea and an achieve project about IP core of EPP is put forward in this paper.
介绍了EPP并口以及IP核的知识,给出该IP核的硬件实现结构。
4) ENHANCED PARALLEL PORT(EPP)
并口EPP
5) Enhance Parallel Port
EPP并行口
6) EPP parallel interface
EPP并行接口
补充资料：波导通信(见毫米波通信)
波导通信(见毫米波通信)
wave guide communication
bodao tongxin波导通信(wave guide communieation)见毫米波通信。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条