1) voltage build-up capacitance
建压电容
2) self-excited capacitance
建压电容值
1.
A new approach was developed to optimize the self-excited capacitance and to calculate the related no-load terminal voltage.
以异步发电机基值频率所对应的等值电路为基础,令等值电路回路阻抗的实部与虚部分别为零作为异步发电机稳态运行的条件,并由此计算异步空载建压电容值。
3) minimum capacitance for voltage build-up
最小建压电容
4) capacitor voltage
电容电压
1.
For avoiding the unbalance of capacitor voltage, the summation of charge injected in neutral point must be zero.
电容电压不均衡是二极管钳位型多电平逆变器中一个关键技术问题。
2.
The modulation approaches based on the space vector pulse width modulation (SVPWM) is incapable of controlling the capacitor voltage for high modulation indexes and low power factors in NPC three-level inverter.
空间矢量脉宽调制(space vector pulse-width modulation,SVPWM)由于算法本身的缺陷,在调制度较高且功率因数较低时,电容电压出现低频波动。
3.
The modulation approaches based on the space vector pulse width modulation(SVPWM) and the sinusoidal carrier-based modulation(SPWM) are incapable of controlling the capacitor voltage for high modulation indexes and low power factors in diode clamped three-level inverter.
电容电压偏移是二极管箝位型多电平逆变器的主要缺点。
5) C-V
电容-电压
1.
A relative large built-in potential was obtained by investigating the capacitance-voltage(C-V) characteristic,from which the schematic band alignment of IMO/p-Si was plotted.
根据对IMO/p-Si异质结进行的电容-电压测得的内建势获得了其大致的接触能带排列图,并由此可以推断IMO/n-Si的接触能带图。
2.
This project investigates two-sided capacitance-voltage (C-V) technique for application in doping profile characterization of Si ultra shallow p+-n junctions.
本论文研究了通过使用阶梯状掺杂的埋层对超浅结(如p+-n结)进行双边电容-电压(C-V)剖面分析,从而提取p区的掺杂浓度分布。
6) grading capacitance
均压电容
1.
A grading capacitance explosion occurs during switching no-load in 500 kV long line.
在一次500kV开关切空载长线操作中,发生了对侧开关均压电容爆炸事故。
补充资料：电容分压器(见分压器)
电容分压器(见分压器)
capacitor voltage dividers
d)onf。日g无en丫oq{电容分压器(eaPaeitor voltage dividers)见分压器。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条