1) NAND gate
"与非"门
1.
To make a stude of simplification of Karnaugh map algorithm in grade 3 NAND circuit design and solve the problem of functional expression in designing:Reducimg the numbers of the 2nd grade NAND gate utilizing the combination of product phrases;Reducing the numbers of the lst grade NAND gate utilizing tail factor,the result shows that the method is direct and simplification is rapid.
研究了3级"与非"电路设计中卡诺图算法的简化,解决了设计中的函数表达式的问题:利用乘积项的合并,减少了第Ⅱ级"与非"门的数目;利用尾因子的选取,减少了第Ⅰ级"与非"门的数目。
2) NAND gate
与非门
1.
Linear amplification characteristic of HD74LS00P integrated NAND gate;
HD74LS00P集成与非门的线性放大性能研究
2.
The article states three disadvantages existing in the CMOS NAND gate , the output resistance Ro is influenced by the condition of the input terminal; the output high or low frequency is influenced by the quantities of the input terminal; the attribute of voltage transmit is influenced by the working conditions of the input terminal.
论述了CMOS与非门存在的三个缺点:输出电阻Ro受输入端状态的影响,输出的高、低电平受输入端数目的影响,输入端工作状态不同时对电压传输特性的影响。
3.
The article discusses the amplitude-frequency of RC coupling magnifier assuming the form of its self-supporting working voltage on the basic of experiments, and proves the feasibility to apply the feature of HD74lSOOP NAND gate’s linearity from a certain perspective.
以实验为依据,研究了自偏压式RC耦合放大器的幅频特性,验证了HD74LS00P与非门线性运用的可行性。
3) TTL NAND Gate
TTL与非门
1.
Test the Voltage Transfer Characteristics of TTL NAND Gate by Double-t rail Oscillograph;
用双踪示波器测试TTL与非门电压传输特性
2.
Two methods of indirectly determining parameter of TTL NAND gate;
两种间接测量TTL与非门参量的方法
3.
When master-slave JK flip-flop consisting of TTL NAND gates is in fall edge of CP ,The output state can be led to unusual.
由TTL与非门构成的主从JK触发器在CP下降沿会出现输出状态异变 ,本文对这一问题进行了研究。
4) AND(NAND)gate
与（与非）门
5) AND NOT gate; EXCEPT gate; INHIBITORY gate
“与非”门
6) NAND gate
“与非”门
参考词条
补充资料：T门
照相机上的快门数字是分级装置，其中设有“b”、“t”两级慢门。“b”门在按动快门钮时就开，放手就关。“t”门开启后，还须按第二次快门钮或转动下一张片子方能关闭。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。