Based on an analysis of the timer structure on the C54_X,a new design scheme of an adiabatic timer is presented using the theory of three essential circuit elements for adiabatic circuits and the characteristics of the clocked transmission gate adiabatic logic circuit and its adiabatic flip-flop.

This paper presents a six-value algebra in order to form the theory of three essential elements (theory of signal-network-load) for five-valuecircuits, which is a mathematical tool for quantitative investigation on five-value circuits.

Five-valued counter based on three essential circuit elements;

Static random access memory(SRAM) design based on adiabatic circuits;