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1)  semi-parallel architecture
半并行结构
1.
Then it uses semi-parallel architecture to simplify the complexity of multipliers,reduces the required memory for storing,and designs the effective coding algorithm based on Xilinx Vir.
然后使用Q矢量,简化了H矩阵存储量,采用半并行结构,提高了编码速度。
2.
Then we use semi-parallel architecture to simplify complexity of multipliers, reduce the required memory for storing £“and we have completed physical implementation on Xilinx Virtex2 XC2V1000 in Verilog language by Xilinx ISE soft.
论文介绍了一种基于Q矩阵的准规则LDPC码编码器直接用H矩阵进行设计,简化了H矩阵存储量,采用半并行结构,能进行运算量为线性复杂度的快速编码。
2)  parallel structure
并行结构
1.
Gabor wavelet neural network algorithm based on parallel structure;
基于并行结构的Gabor小波神经网络算法及应用
2.
Multiple neural network integration classifier of parallel structure based on DSP;
基于DSP并行结构的多神经网络集成分类器
3.
Parallel structure is applied to the design of power active filter control system.
采用并行结构控制设计了电力有源滤波器控制系统,并针对APF的保护电路、人机接口电路,在不同工况下进行了大量的动态模拟实验。
3)  parallel [英]['pærəlel]  [美]['pærə'lɛl]
并行结构
1.
This paper proposed a reconfigurable parallel intra predictor generator.
提出了一种基于可重构设计的并行结构的H。
4)  parallel architecture
并行结构
1.
Further,the implementation method and feasibility of a filter with parallel architecture were analyzed,and this algorithm was used to realize parallel.
分析了并行结构滤波器的实现方法以及可行性,在FPGA器件上对该算法实现并行设计,给出了硬件具体实现模块。
2.
To overcome such bottleneck in existing protocols and exploit the evolving characteristics of high speed networks, based on a highly parallel architecture, a high performance transport protocol (HTPNET) and its experimental system is introduced in this paper.
介绍了一个建立在高级并行结构之上的高性能的传输协议HTPNET及其实验系统。
3.
A parallel architecture double-precision floating-point matrix multiplier was designed to improve the performance of matrix multiplication.
设计了一个并行结构双精度浮点矩阵乘法器以提高矩阵乘法的计算性能,并在Xilinx Virtex-4 SX55现场可编程门阵列(FPGA)上完成了方案的实现。
5)  DSP of parallel structure
DSP并行结构
6)  Serial-parallel structure
串-并行结构
补充资料:宽禁带半导体(见半导体的能带结构)


宽禁带半导体(见半导体的能带结构)
wide gap semiconductor

  习一’平叼能带结构。‘J~正J“、二二,,Conauctor见半
  
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