1) PFD
鉴频鉴相器
1.
Design and Research of PFD and CP in Digital TV Tuner;
数字电视调谐器中鉴频鉴相器与电荷泵的研究与设计
2.
The proposed CPPLL is made up of a no dead zone phase frequency detector(PFD),a loop filter(LPF),a charge pump(CP),a voltage-controlled oscillator(VCO) and dividers.
该电路包括无死区的鉴频鉴相器(PFD)、低通滤波器(LPF)、电荷泵(CP)、压控振荡器(VCO)及分频器组成。
3.
13 μm CMOS technology,consisting of a PFD with excellent high-frequency performance,low-voltage noise-suppressed charge pump,classic symmetrical-load differential delay cells and duty-buffer of 50% duty-cycle,etc.
设计了一款应用于超宽带无线收发器中的低抖动、低功耗、多相位输出、输出频率为528MHz和132 MHz的锁相环,包括了高频特性好的鉴频鉴相器、低电压抗抖动的电荷泵、经典的低电压对称负载差分延迟单元以及duty-buffer的双转单电路等。
2) phase frequency detector
鉴频鉴相器
1.
This article introduces an typical application of HMC440 which is an ultra low phase noise floor phase frequency detector produced by HITTITE.
介绍了HITTITE公司一款具有超低相位噪声基底的鉴频鉴相器HMC440在C波段锁相频率合成器中的应用。
2.
By injecting the compensation current into the passive loop filter during the delay time of the phase frequency detector(PFD),a maximum reduction of the phase noise by about 16dB can be achieved.
通过在鉴频鉴相器中的延迟时段向无源滤波器中注入补偿电流,最大可实现16dB的噪声补偿。
3.
This paper presents a differentail-type phase frequency detector(PFD)of SCL structure.
介绍一种基于场效应管源级耦合逻辑 (SCL)结构的高精度差分型鉴频鉴相器 (PFD)的设计 ,包括构成PFD的SCL结构基本单元———SCL结构D触发器、与非门、倒相器和缓冲单元。
3) phase-frequency detector
鉴频鉴相器
1.
A Design of Tri-state Phase-Frequency Detector;
一种三态鉴频鉴相器的设计
2.
A fast-locking,low-jitter,phase-locked loop (PLL) with a simple phase-frequency detector is proposed.
用简单的鉴频鉴相器结构实现了一个快锁定低抖动的锁相环。
6) PFD
鉴相鉴频器
1.
An adaptive Phase-Locked Loop (PLL) with a fast settling time and its key blocks including Phase-Frequency Detector (PFD) and charge pump are then proposed and analyzed.
提出并分析了一种自适应的具有快速建立时间的锁相环结构及其关键模块(鉴相鉴频器和电荷泵)。
补充资料：器鉴
1.犹器识。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条